| Parameters |
| Factory Lead Time |
12 Weeks |
| Mounting Type |
Surface Mount |
| Package / Case |
8-VFSOP (0.091, 2.30mm Width) |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tape & Reel (TR) |
| Published |
2011 |
| Series |
TC7W |
| Part Status |
Active |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Type |
D-Type |
| Voltage - Supply |
2V~6V |
| Base Part Number |
7W74 |
| Function |
Set(Preset) and Reset |
| Output Type |
Differential |
| Number of Elements |
1 |
| Clock Frequency |
67MHz |
| Current - Quiescent (Iq) |
2μA |
| Current - Output High, Low |
5.2mA 5.2mA |
| Max Propagation Delay @ V, Max CL |
26ns @ 6V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
5pF |
| RoHS Status |
RoHS Compliant |
TC7W74FK,LF Overview
In the form of 8-VFSOP (0.091, 2.30mm Width), it has been packaged. As part of the package Tape & Reel (TR), it is embedded. There is a Differentialoutput configured with it. There is a trigger configured with Positive Edge. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 2V~6V volts. Currently, the operating temperature is -40°C~85°C TA. D-Typeis the type of this D latch. JK flip flop is a part of the TC7Wseries of FPGAs. This D flip flop should not have a frequency greater than 67MHz. A total of 1elements are contained within it. This process consumes 2μA quiescents. JK flip flop belongs to 7W74 family. Its input capacitance is 5pFfarads.
TC7W74FK,LF Features
Tape & Reel (TR) package
TC7W series
TC7W74FK,LF Applications
There are a lot of Toshiba Semiconductor and Storage TC7W74FK,LF Flip Flops applications.
- Common Clocks
- Synchronous counter
- Clock pulse
- High Performance Logic for test systems
- Instrumentation
- Bounce elimination switch
- Reduced system switching noise
- Control circuits
- Computers
- Pattern generators