SN74LVC2G80DCURE4
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-VFSOP (0.091, 2.30mm Width) |
| Number of Pins | 8 |
| Weight | 9.610488mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVC2G80 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Inverted |
| Polarity | Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Clock Frequency | 160MHz |
| Propagation Delay | 5.2 ns |
| Turn On Delay Time | 1.1 ns |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 5μA |
| Current - Output High, Low | 32mA 32mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 4.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 0.9mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Contains Lead |
SN74LVC2G80DCURE4 Overview
It is packaged in the way of 8-VFSOP (0.091, 2.30mm Width). You can find it in the Tape & Reel (TR)package. T flip flop uses Invertedas the output. This trigger uses the value Positive Edge. Surface Mountis in the way of this electric part. The JK flip flop operates at 1.65V~5.5Vvolts. Temperature is set to -40°C~125°C TA. D-Typedescribes this flip flop. JK flip flop belongs to the 74LVCseries of FPGAs. There should be no greater frequency than 160MHzon its output. As a result, it consumes 5μA quiescent current. In 8terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. You can search similar parts based on 74LVC2G80. Power is provided by a 1.8V supply. The input capacitance of this T flip flop is 3.5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. This D flip flop belongs to the family of LVC/LCX/Z. It is mounted by the way of Surface Mount. The 8pins are designed into the board. A Positive Edgeclock edge trigger is used in this device. It is included in FF/Latches. As soon as Vsup reaches 5.5V, the maximum supply voltage is reached. In order to achieve its superior flexibility, 2 circuits are used. This D flip flop is well suited for TAPE AND REEL based on its reliable performance. The D latch runs on a voltage of 3.3V volts. There are 1 output lines on it.
SN74LVC2G80DCURE4 Features
Tape & Reel (TR) package
74LVC series
8 pins
3.3V power supplies
SN74LVC2G80DCURE4 Applications
There are a lot of Texas Instruments SN74LVC2G80DCURE4 Flip Flops applications.
- Storage Registers
- Modulo – n – counter
- Circuit Design
- Counters
- High Performance Logic for test systems
- Balanced Propagation Delays
- Buffer registers
- Pattern generators
- Matched Rise and Fall
- 2 – Bit synchronous counter