Parameters |
Current - Output High, Low |
32mA 32mA |
Max I(ol) |
0.024 A |
Number of Gates |
1 |
Max Propagation Delay @ V, Max CL |
4.5ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3.5pF |
Clock Edge Trigger Type |
Positive Edge |
Height Seated (Max) |
0.5mm |
Width |
0.9mm |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Contains Lead |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
5-XFBGA, DSBGA |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Cut Tape (CT) |
Series |
74LVC |
Pbfree Code |
no |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
5 |
Type |
D-Type |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
CMOS |
Voltage - Supply |
1.65V~5.5V |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
1.8V |
Terminal Pitch |
0.5mm |
Reach Compliance Code |
not_compliant |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74LVC1G80 |
JESD-30 Code |
R-XBGA-B5 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Inverted |
Polarity |
Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
3.3V |
Load Capacitance |
50pF |
Number of Bits |
1 |
Clock Frequency |
160MHz |
Propagation Delay |
4.5 ns |
Turn On Delay Time |
1.1 ns |
Family |
LVC/LCX/Z |
Current - Quiescent (Iq) |
10μA |
Output Characteristics |
3-STATE |
SN74LVC1G80YEAR Overview
In the form of 5-XFBGA, DSBGA, it has been packaged. There is an embedded version in the package Cut Tape (CT). Invertedis the output configured for it. JK flip flop uses Positive Edgeas the trigger. Surface Mountis in the way of this electric part. With a supply voltage of 1.65V~5.5V volts, it operates. The operating temperature is -40°C~85°C TA. A flip flop of this type is classified as a D-Type. It belongs to the 74LVCseries of FPGAs. A frequency of 160MHzshould be the maximum output frequency. During its operation, it consumes 10μA quiescent energy. There are 5 terminations,The 74LVC1G80family includes it. An input voltage of 1.8Vpowers the D latch. JK flip flop input capacitance is 3.5pF farads. In terms of electronic devices, this device belongs to the LVC/LCX/Zfamily of devices. This electronic part is mounted in the way of Surface Mount. There is a clock edge trigger type of Positive Edgeon this device. It is part of the FF/Latchesbase part number family. Flip flops designed with 1bits are used in this part. It reaches 5.5Vwhen the supply voltage is maximal (Vsup). Considering the reliability of this T flip flop, it is well suited for TAPE AND REEL. The D latch runs on a voltage of 3.3V volts. In its basic form, it contains 1 gates.
SN74LVC1G80YEAR Features
Cut Tape (CT) package
74LVC series
1 Bits
3.3V power supplies
1 gates
SN74LVC1G80YEAR Applications
There are a lot of Texas Instruments SN74LVC1G80YEAR Flip Flops applications.
- Bus hold
- Counters
- Balanced 24 mA output drivers
- Test & Measurement
- Registers
- Circuit Design
- Consumer
- Latch-up performance
- 2 – Bit synchronous counter
- Memory