SN74LVC1G175DRYR
| Parameters | |
|---|---|
| Factory Lead Time | 6 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 4 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 6-UFDFN |
| Number of Pins | 6 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.5mm |
| Base Part Number | 74LVC1G175 |
| Function | Reset |
| Output Type | Non-Inverted |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Number of Circuits | 1 |
| Load Capacitance | 50pF |
| Number of Bits | 1 |
| Clock Frequency | 175MHz |
| Propagation Delay | 5.7 ns |
| Quiescent Current | 10μA |
| Turn On Delay Time | 1 ns |
| Family | LVC/LCX/Z |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 32mA |
| Max I(ol) | 0.032 A |
| Max Propagation Delay @ V, Max CL | 5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Clock Edge Trigger Type | Positive Edge |
| Height | 600μm |
| Length | 1.45mm |
| Width | 1mm |
| Thickness | 500μm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LVC1G175DRYR Overview
The flip flop is packaged in a case of 6-UFDFN. Package Tape & Reel (TR)embeds it. T flip flop uses Non-Invertedas its output configuration. Positive Edgeis the trigger it is configured with. Surface Mountis in the way of this electric part. Powered by a 1.65V~5.5Vvolt supply, it operates as follows. In the operating environment, the temperature is -40°C~125°C TA. This logic flip flop is classified as type D-Type. The FPGA belongs to the 74LVC series. It should not exceed 175MHzin terms of its output frequency. There have been 6 terminations. The object belongs to the 74LVC1G175 family. Power is supplied from a voltage of 1.8V volts. JK flip flop input capacitance is 3pF farads. It is a member of the LVC/LCX/Zfamily of D flip flop. A part of the electronic system is mounted in the way of Surface Mount. Basically, it is designed with a set of 6 pins. The clock edge trigger type for this device is Positive Edge. This part is included in FF/Latches. There are 1bits in this flip flop. There is a 5.5Vmaximum supply voltage (Vsup). Its superior flexibility is attributed to its use of 1 circuits. Due to its reliability, this T flip flop is well suited for TR. A power supply of 3.3Vis required to operate it. As a result, it consumes 10μA of quiescent current without being affected by external factors.
SN74LVC1G175DRYR Features
Tape & Reel (TR) package
74LVC series
6 pins
1 Bits
3.3V power supplies
SN74LVC1G175DRYR Applications
There are a lot of Texas Instruments SN74LVC1G175DRYR Flip Flops applications.
- QML qualified product
- Instrumentation
- Single Down Count-Control Line
- Computers
- Balanced 24 mA output drivers
- Shift Registers
- 2 – Bit synchronous counter
- Data Synchronizers
- Data storage
- Supports Live Insertion