SN74LV74APWR
| Parameters | |
|---|---|
| Factory Lead Time | 6 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 1 day ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 14 |
| Weight | 57.209338mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74LV |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Matte Tin (Sn) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Base Part Number | 74LV74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 12mA |
| Clock Frequency | 140MHz |
| Propagation Delay | 20 ns |
| Quiescent Current | 20μA |
| Turn On Delay Time | 9.8 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Output High, Low | 12mA 12mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 9.3ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 2pF |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 45000000Hz |
| Height | 1.2mm |
| Length | 5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LV74APWR Overview
As a result, it is packaged as 14-TSSOP (0.173, 4.40mm Width). As part of the package Cut Tape (CT), it is embedded. T flip flop is configured with an output of Differential. It is configured with a trigger that uses a value of Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. It operates with a supply voltage of 2V~5.5V. It is at -40°C~125°C TAdegrees Celsius that the system is operating. This electronic flip flop is of type D-Type. The FPGA belongs to the 74LV series. It should not exceed 140MHzin terms of its output frequency. The number of terminations is 14. The 74LV74 family contains this object. A voltage of 2.5V is used to power it. Its input capacitance is 2pFfarads. Devices in the LV/LV-A/LVX/Hfamily are electronic devices. There is an electronic part that is mounted in the way of Surface Mount. Basically, it is designed with a set of 14 pins. There is a clock edge trigger type of Positive Edgeon this device. This RS flip flops is a part number FF/Latches. It reaches 5.5Vwhen the supply voltage is maximal (Vsup). Normal operation requires a supply voltage (Vsup) above 2V. Its superior flexibility is attributed to its use of 2 circuits. In light of its reliable performance, this T flip flop is well suited for TR. It runs on 3.3Vvolts of power. Featuring the maximum design flexibility, it has an output current of 12mA . It consumes 20μA of quiescent current without being affected by external factors.
SN74LV74APWR Features
Cut Tape (CT) package
74LV series
14 pins
3.3V power supplies
SN74LV74APWR Applications
There are a lot of Texas Instruments SN74LV74APWR Flip Flops applications.
- Synchronous counter
- Single Down Count-Control Line
- Computing
- Computers
- 2 – Bit synchronous counter
- Guaranteed simultaneous switching noise level
- Power down protection
- Latch
- Patented noise
- Instrumentation