SN74LV374ATRGYRG4
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-VFQFN Exposed Pad |
| Number of Pins | 20 |
| Weight | 43.006227mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | no |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 2 (1 Year) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | QUAD |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 0.5mm |
| Base Part Number | 74LV374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 16mA |
| Number of Bits | 8 |
| Clock Frequency | 150MHz |
| Propagation Delay | 19.3 ns |
| Turn On Delay Time | 4.9 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 2μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 16mA 16mA |
| Max Propagation Delay @ V, Max CL | 10.1ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 50000000Hz |
| Length | 4.5mm |
| Width | 3.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Contains Lead |
SN74LV374ATRGYRG4 Overview
As a result, it is packaged as 20-VFQFN Exposed Pad. It is contained within the Tape & Reel (TR)package. In the configuration, Tri-State, Non-Invertedis used as the output. JK flip flop uses Positive Edgeas the trigger. Surface Mountmounts this electrical part. A supply voltage of 4.5V~5.5V is required for operation. In the operating environment, the temperature is -40°C~125°C TA. There is D-Type type of electronic flip flop associated with this device. This type of FPGA is a part of the 74LV series. There should be no greater frequency than 150MHzon its output. D latch consists of 1 elements. T flip flop consumes 2μA quiescent energy. Terminations are 20. Members of the 74LV374family make up this object. Power is supplied from a voltage of 2.5V volts. The input capacitance of this JK flip flopis 4pF farads. Devices in the LV/LV-A/LVX/Hfamily are electronic devices. It is mounted by the way of Surface Mount. There are 20pins on it. There is a clock edge trigger type of Positive Edgeon this device. This RS flip flops is a part number FF/Latches. It is designed with a number of bits of 8. 5.5Vis the maximum supply voltage (Vsup). For normal operation, the supply voltage (Vsup) should be above 2V. Despite its superior flexibility, it relies on 8 circuits to achieve it. This D flip flop is well suited for TAPE AND REEL based on its reliable performance. An electrical current of 3.3V volts is applied to it. This D flip flop is equipped with 0 ports. As a result of its output current of 16mA, it is very flexible in terms of design.
SN74LV374ATRGYRG4 Features
Tape & Reel (TR) package
74LV series
20 pins
8 Bits
3.3V power supplies
SN74LV374ATRGYRG4 Applications
There are a lot of Texas Instruments SN74LV374ATRGYRG4 Flip Flops applications.
- Bounce elimination switch
- Instrumentation
- Latch-up performance
- Convert a momentary switch to a toggle switch
- ESCC
- Circuit Design
- Guaranteed simultaneous switching noise level
- Shift registers
- Latch
- Balanced 24 mA output drivers