SN74LV374ATPWT
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Supplier Device Package | 20-TSSOP |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LV |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 4.5V~5.5V |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Clock Frequency | 150MHz |
| Current - Quiescent (Iq) | 2μA |
| Current - Output High, Low | 16mA 16mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 10.1ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| RoHS Status | ROHS3 Compliant |
SN74LV374ATPWT Overview
20-TSSOP (0.173, 4.40mm Width)is the way it is packaged. The Tape & Reel (TR)package contains it. T flip flop uses Tri-State, Non-Invertedas the output. It is configured with the trigger Positive Edge. There is an electronic component mounted in the way of Surface Mount. The supply voltage is set to 4.5V~5.5V. It is at -40°C~125°C TAdegrees Celsius that the system is operating. This D latch has the type D-Type. JK flip flop belongs to the 74LVseries of FPGAs. Its output frequency should not exceed 150MHz Hz. In total, it contains 1 elements. This process consumes 2μA quiescents. A JK flip flop with a 4pFfarad input capacitance is used here.
SN74LV374ATPWT Features
Tape & Reel (TR) package
74LV series
SN74LV374ATPWT Applications
There are a lot of Rochester Electronics, LLC SN74LV374ATPWT Flip Flops applications.
- Latch
- Test & Measurement
- Reduced system switching noise
- Event Detectors
- Instrumentation
- Storage registers
- Frequency Divider circuits
- Load Control
- CMOS Process
- Power down protection