SN74LS96N3
| Parameters | |
|---|---|
| Package / Case | PDIP |
| Surface Mount | NO |
| Pbfree Code | no |
| Number of Terminations | 16 |
| HTS Code | 8542.39.00.01 |
| Subcategory | Shift Registers |
| Technology | TTL |
| Terminal Position | DUAL |
| Terminal Form | THROUGH-HOLE |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Number of Functions | 1 |
| Supply Voltage | 5V |
| Terminal Pitch | 2.54mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Pin Count | 16 |
| Qualification Status | Not Qualified |
| Operating Temperature (Max) | 70°C |
| Supply Voltage-Max (Vsup) | 5.25V |
| Power Supplies | 5V |
| Temperature Grade | COMMERCIAL |
| Supply Voltage-Min (Vsup) | 4.75V |
| Number of Bits | 5 |
| Family | LS |
| Output Polarity | TRUE |
| Logic IC Type | PARALLEL IN PARALLEL OUT |
| Trigger Type | POSITIVE EDGE |
| Propagation Delay (tpd) | 40 ns |
| fmax-Min | 25 MHz |
| Count Direction | RIGHT |
| Height Seated (Max) | 5.08mm |
| Length | 19.305mm |
| Width | 7.62mm |
| RoHS Status | Non-RoHS Compliant |
SN74LS96N3 Overview
PDIP is the package in which the device is embedded. 16 is the number of terminations on the chip. This part has an operating supply voltage of 5V. Electronic components are categorized as LS. The minimum supply voltage (Vsup) for this part should not be less than 4.75V. It can deliver voltage at 5V. It is recommended that the maximum supply voltage for this part is not greater than 5.25V (Vsup). A total of 5 bits are present on the IC chip. 16 pins are present on it. In its subcategory, it is listed under Shift Registers. Temperatures higher than 70°C should not be used.
SN74LS96N3 Features
It supplies 5V power
SN74LS96N3 Applications
There are a lot of Texas Instruments SN74LS96N3 Shift Registers applications.
- LED matrix control
- Serial to parallel converter
- store data in digital form
- Pulse Extenders
- Serial-to-parallel data conversion
- data manipulation
- Delay Line
- Interconnectors
- Remote control holding register
- Dual-rank shift, hold, and bus applications