| Parameters |
| Factory Lead Time |
6 Weeks |
| Lifecycle Status |
ACTIVE (Last Updated: 1 day ago) |
| Contact Plating |
Gold |
| Mount |
Surface Mount |
| Mounting Type |
Surface Mount |
| Package / Case |
20-SOIC (0.295, 7.50mm Width) |
| Number of Pins |
20 |
| Weight |
500.709277mg |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tube |
| Series |
74HC |
| JESD-609 Code |
e4 |
| Pbfree Code |
yes |
| Part Status |
Active |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| ECCN Code |
EAR99 |
| Type |
D-Type |
| Additional Feature |
DUMMY VAL |
| Subcategory |
FF/Latches |
| Technology |
CMOS |
| Voltage - Supply |
2V~6V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
5V |
| Base Part Number |
74HC273 |
| Function |
Master Reset |
| Output Type |
Non-Inverted |
| Operating Supply Voltage |
5V |
| Polarity |
Non-Inverting |
| Supply Voltage-Max (Vsup) |
6V |
| Supply Voltage-Min (Vsup) |
2V |
| Number of Channels |
8 |
| Load Capacitance |
50pF |
| Nominal Supply Current |
8μA |
| Output Current |
5.2mA |
| Clock Frequency |
60MHz |
| Propagation Delay |
13 ns |
| Quiescent Current |
8μA |
| Turn On Delay Time |
13 ns |
| Family |
HC/UH |
| Logic Function |
D-Type, Flip-Flop |
| Current - Output High, Low |
5.2mA 5.2mA |
| Number of Bits per Element |
8 |
| Max Propagation Delay @ V, Max CL |
13ns @ 6V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
3pF |
| Number of Input Lines |
2 |
| Number of Output Lines |
1 |
| Clock Edge Trigger Type |
Positive Edge |
| Max Junction Temperature (Tj) |
150°C |
| Ambient Temperature Range High |
85°C |
| Height |
2.65mm |
| Length |
12.8mm |
| Width |
7.5mm |
| Thickness |
2.35mm |
| Radiation Hardening |
No |
| REACH SVHC |
No SVHC |
| RoHS Status |
ROHS3 Compliant |
| Lead Free |
Lead Free |
SN74HC273DW Overview
The flip flop is packaged in 20-SOIC (0.295, 7.50mm Width). You can find it in the Tubepackage. There is a Non-Invertedoutput configured with it. The trigger configured with it uses Positive Edge. The electronic part is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 2V~6V. Currently, the operating temperature is -40°C~85°C TA. D-Typedescribes this flip flop. The 74HCseries comprises this type of FPGA. A frequency of 60MHzshould be the maximum output frequency. Terminations are 20. This D latch belongs to the family of 74HC273. The D flip flop is powered by a voltage of 5V . There is 3pF input capacitance for this T flip flop. HC/UHis the family of this D flip flop. A part of the electronic system is mounted in the way of Surface Mount. A total of 20pins are provided on this board. In this device, the clock edge trigger type is Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. Vsup reaches its maximum value at 6V. Normal operation requires a supply voltage (Vsup) above 2V. The supply voltage should be maintained at 5V for high efficiency. Its output current of 5.2mAallows for maximum design flexibility. There are 1 output lines in this JK flip flop. Currently, there are 2 lines of input. It consumes a total of 8μA quiescent current at any given time. As an additional reference, you may refer to electronic flip flop DUMMY VAL. There are 8 channels available.
SN74HC273DW Features
Tube package
74HC series
20 pins
SN74HC273DW Applications
There are a lot of Texas Instruments SN74HC273DW Flip Flops applications.
- Set-reset capability
- Power down protection
- Memory
- Dynamic threshold performance
- Data storage
- Count Modes
- Shift registers
- Parallel data storage
- Cold spare funcion
- EMI reduction circuitry