SN74AUP2G79RSER
| Parameters | |
|---|---|
| Factory Lead Time | 6 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 5 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-UFQFN |
| Number of Pins | 8 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUP |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 0.8V~3.6V |
| Terminal Position | QUAD |
| Terminal Form | NO LEAD |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AUP2G79 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Non-Inverted |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Load Capacitance | 30pF |
| Clock Frequency | 266MHz |
| Propagation Delay | 24 ns |
| Turn On Delay Time | 3 ns |
| Family | AUP/ULP/V |
| Current - Quiescent (Iq) | 500nA |
| Current - Output High, Low | 4mA 4mA |
| Max I(ol) | 0.004 A |
| Number of Gates | 2 |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 6.3ns @ 3.3V, 30pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 1.5pF |
| Power Supply Current-Max (ICC) | 0.0009mA |
| Clock Edge Trigger Type | Positive Edge |
| Height | 600μm |
| Length | 1.5mm |
| Width | 1.5mm |
| Thickness | 550μm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74AUP2G79RSER Overview
It is embeded in 8-UFQFN case. A package named Tape & Reel (TR)includes it. Currently, the output is configured to use Non-Inverted. There is a trigger configured with Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. A 0.8V~3.6Vsupply voltage is required for it to operate. -40°C~85°C TAis the operating temperature. It is an electronic flip flop with the type D-Type. This type of FPGA is a part of the 74AUP series. A frequency of 266MHzshould not be exceeded by its output. There is a consumption of 500nAof quiescent energy. Terminations are 8. D latch belongs to the 74AUP2G79 family. It is powered by a voltage of 1.2V . A 1.5pFfarad input capacitance is provided by this T flip flop. Electronic devices of this type belong to the AUP/ULP/Vfamily. There is an electronic part mounted in the way of Surface Mount. Basically, it is designed with a set of 8 pins. In this device, the clock edge trigger type is Positive Edge. The part you are looking for is included in FF/Latches. In this case, the maximum supply voltage (Vsup) reaches 3.6V. As a result of its reliable performance, this T flip flop is suitable for TR. Its basic building block contains 2 gates.
SN74AUP2G79RSER Features
Tape & Reel (TR) package
74AUP series
8 pins
2 gates
SN74AUP2G79RSER Applications
There are a lot of Texas Instruments SN74AUP2G79RSER Flip Flops applications.
- Parallel data storage
- Differential Individual
- Guaranteed simultaneous switching noise level
- Bus hold
- QML qualified product
- 2 – Bit synchronous counter
- Consumer
- Pattern generators
- Communications
- Data Synchronizers