SN74AUP1G80YZPR
| Parameters | |
|---|---|
| Factory Lead Time | 6 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 4 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 5-XFBGA, DSBGA |
| Number of Pins | 5 |
| Weight | 1.587573mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUP |
| JESD-609 Code | e1 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 5 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 0.8V~3.6V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AUP1G80 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Inverted |
| Polarity | Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 0.8V |
| Number of Circuits | 1 |
| Load Capacitance | 30pF |
| Number of Bits | 1 |
| Clock Frequency | 257MHz |
| Propagation Delay | 20.7 ns |
| Turn On Delay Time | 3.1 ns |
| Family | AUP/ULP/V |
| Current - Quiescent (Iq) | 500nA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 4mA 4mA |
| Max I(ol) | 0.004 A |
| Max Propagation Delay @ V, Max CL | 6.4ns @ 3.3V, 30pF |
| Prop. Delay@Nom-Sup | 28.7 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 1.5pF |
| Power Supply Current-Max (ICC) | 0.0009mA |
| fmax-Min | 260 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 260000000Hz |
| Height | 500μm |
| Length | 1.75mm |
| Width | 1.25mm |
| Thickness | 310μm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74AUP1G80YZPR Overview
As a result, it is packaged as 5-XFBGA, DSBGA. Package Tape & Reel (TR)embeds it. As configured, the output uses Inverted. Positive Edgeis the trigger it is configured with. Surface Mountis occupied by this electronic component. A supply voltage of 0.8V~3.6V is required for operation. The operating temperature is -40°C~85°C TA. A flip flop of this type is classified as a D-Type. The FPGA belongs to the 74AUP series. A frequency of 257MHzshould not be exceeded by its output. As a result, it consumes 500nA quiescent current and is not affected by external forces. A total of 5 terminations have been made. The object belongs to the 74AUP1G80 family. It is powered by a voltage of 1.2V . A JK flip flop with a 1.5pFfarad input capacitance is used here. In this case, the D flip flop belongs to the AUP/ULP/Vfamily. This electronic part is mounted in the way of Surface Mount. 5pins are included in its design. There is a clock edge trigger type of Positive Edgeon this device. This RS flip flops is a part number FF/Latches. Flip flops designed with 1bits are used in this part. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. It is imperative that the supply voltage (Vsup) is maintained above 0.8Vin order to ensure normal operation. 1 circuits are used to achieve its superior flexibility. This D flip flop is well suited for TR based on its reliable performance.
SN74AUP1G80YZPR Features
Tape & Reel (TR) package
74AUP series
5 pins
1 Bits
SN74AUP1G80YZPR Applications
There are a lot of Texas Instruments SN74AUP1G80YZPR Flip Flops applications.
- ESD performance
- Convert a momentary switch to a toggle switch
- Frequency Divider circuits
- Shift registers
- Instrumentation
- Cold spare funcion
- Reduced system switching noise
- High Performance Logic for test systems
- Latch
- Divide a clock signal by 2 or 4