SN74AUC2G79DCUR
| Parameters | |
|---|---|
| Factory Lead Time | 6 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-VFSOP (0.091, 2.30mm Width) |
| Number of Pins | 8 |
| Weight | 9.610488mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 0.8V~2.7V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AUC2G79 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Non-Inverted |
| Polarity | Non-Inverting |
| Number of Circuits | 2 |
| Clock Frequency | 275MHz |
| Propagation Delay | 2.4 ns |
| Turn On Delay Time | 5 ns |
| Family | AUC |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 9mA 9mA |
| Max I(ol) | 0.009 A |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 1.8ns @ 2.5V, 30pF |
| Prop. Delay@Nom-Sup | 3.9 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 2.5pF |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Height | 900μm |
| Length | 2.3mm |
| Width | 2mm |
| Thickness | 850μm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74AUC2G79DCUR Overview
It is embeded in 8-VFSOP (0.091, 2.30mm Width) case. D flip flop is included in the Tape & Reel (TR)package. This output is configured with Non-Inverted. This trigger is configured to use Positive Edge. It is mounted in the way of Surface Mount. A voltage of 0.8V~2.7Vis used as the supply voltage. The operating temperature is -40°C~85°C TA. It is an electronic flip flop with the type D-Type. In FPGA terms, D flip flop is a type of 74AUCseries FPGA. It should not exceed 275MHzin its output frequency. It consumes 10μA of quiescent current without being affected by external factors. In 8terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. This D latch belongs to the family of 74AUC2G79. The D flip flop is powered by a voltage of 1.2V . Its input capacitance is 2.5pF farads. It is a member of the AUCfamily of D flip flop. In this case, the electronic component is mounted in the way of Surface Mount. This board has 8 pins. This device exhibits a clock edge trigger type of Positive Edge. The part you are looking for is included in FF/Latches. The superior flexibility of this product is achieved by using 2 circuits. Considering its reliability, this T flip flop is well suited for TR. It has 1 output lines to operate.
SN74AUC2G79DCUR Features
Tape & Reel (TR) package
74AUC series
8 pins
SN74AUC2G79DCUR Applications
There are a lot of Texas Instruments SN74AUC2G79DCUR Flip Flops applications.
- Modulo – n – counter
- Memory
- Registers
- ESD protection
- Divide a clock signal by 2 or 4
- 2 – Bit synchronous counter
- Instrumentation
- Load Control
- Shift registers
- Clock pulse