MC74ACT377DWR2
| Parameters | |
|---|---|
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 5V |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74ACT377 |
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Load Capacitance | 50pF |
| Clock Frequency | 140MHz |
| Family | ACT |
| Current - Quiescent (Iq) | 8μA |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | TRUE |
| Max I(ol) | 0.024 A |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 10ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| RoHS Status | Non-RoHS Compliant |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2010 |
| Series | 74ACT |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
MC74ACT377DWR2 Overview
It is packaged in the way of 20-SOIC (0.295, 7.50mm Width). D flip flop is embedded in the Tape & Reel (TR) package. Currently, the output is configured to use Non-Inverted. In the configuration of the trigger, Positive Edgeis used. In this case, the electronic component is mounted in the way of Surface Mount. A 4.5V~5.5Vsupply voltage is required for it to operate. It is operating at a temperature of -40°C~85°C TA. D-Typeis the type of this D latch. In terms of FPGAs, it belongs to the 74ACT series. Its output frequency should not exceed 140MHz. D latch consists of 1 elements. There is a consumption of 8μAof quiescent energy. In 20terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The 74ACT377 family contains it. It is powered by a voltage of 5V . Its input capacitance is 4.5pF farads. A device of this type belongs to the family of ACT. This RS flip flops is a part number FF/Latches. It reaches 5.5Vwhen the supply voltage is maximal (Vsup). For normal operation, the supply voltage (Vsup) should be above 4.5V. This D flip flop is well suited for TAPE AND REEL based on its reliable performance. The D latch runs on a voltage of 5V volts.
MC74ACT377DWR2 Features
Tape & Reel (TR) package
74ACT series
5V power supplies
MC74ACT377DWR2 Applications
There are a lot of ON Semiconductor MC74ACT377DWR2 Flip Flops applications.
- Data transfer
- Parallel data storage
- Guaranteed simultaneous switching noise level
- Storage Registers
- Circuit Design
- 2 – Bit synchronous counter
- Divide a clock signal by 2 or 4
- Common Clocks
- ATE
- Automotive