MC100LVEL51DTR2
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-TSSOP, 8-MSOP (0.118, 3.00mm Width) |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2008 |
| Series | 100LVEL |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 8 |
| Type | D-Type |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -3V TO -3.8V |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | ECL |
| Voltage - Supply | -3V~-3.8V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.65mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 100LVEL51 |
| JESD-30 Code | S-PDSO-G8 |
| Function | Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.8V |
| Power Supplies | -3.3V |
| Supply Voltage-Min (Vsup) | 3V |
| Number of Circuits | 1 |
| Number of Bits | 1 |
| Clock Frequency | 2.8GHz |
| Propagation Delay | 520 ps |
| Turn On Delay Time | 475 ps |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 35mA |
| Prop. Delay@Nom-Sup | 0.55 ns |
| Trigger Type | Positive, Negative |
| Power Supply Current-Max (ICC) | 37mA |
| fmax-Min | 2800 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 2900000000Hz |
| Length | 3mm |
| Width | 3mm |
| RoHS Status | Non-RoHS Compliant |
| Lead Free | Contains Lead |
MC100LVEL51DTR2 Overview
The flip flop is packaged in 8-TSSOP, 8-MSOP (0.118, 3.00mm Width). As part of the package Tape & Reel (TR), it is embedded. In the configuration, Differentialis used as the output. It is configured with a trigger that uses Positive, Negative. There is an electric part mounted in the way of Surface Mount. Powered by a -3V~-3.8Vvolt supply, it operates as follows. It is operating at a temperature of -40°C~85°C TA. A flip flop of this type is classified as a D-Type. In terms of FPGAs, it belongs to the 100LVEL series. A frequency of 2.8GHzshould not be exceeded by its output. Despite external influences, it consumes 35mAof quiescent current. There are 8 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. The 100LVEL51 family contains it. The power source is powered by 3.3V. A part of the electronic system is mounted in the way of Surface Mount. In this device, the clock edge trigger type is Positive Edge. It is part of the FF/Latchesbase part number family. It is designed with a number of bits of 1. 3.8Vis the maximum supply voltage (Vsup). Keeping the supply voltage (Vsup) above 3V is necessary for normal operation. To achieve this superior flexibility, 1 circuits are used. Considering the reliability of this T flip flop, it is well suited for TAPE AND REEL. The D latch operates on -3.3V volts. It is also characterized by NECL MODE: VCC = 0V WITH VEE = -3V TO -3.8V.
MC100LVEL51DTR2 Features
Tape & Reel (TR) package
100LVEL series
1 Bits
-3.3V power supplies
MC100LVEL51DTR2 Applications
There are a lot of ON Semiconductor MC100LVEL51DTR2 Flip Flops applications.
- Load Control
- CMOS Process
- EMI reduction circuitry
- Cold spare funcion
- Control circuits
- 2 – Bit synchronous counter
- Supports Live Insertion
- Frequency Dividers
- Shift Registers
- Buffer registers