| Parameters |
| Factory Lead Time |
27 Weeks |
| Lifecycle Status |
ACTIVE (Last Updated: 3 days ago) |
| Mount |
Surface Mount |
| Mounting Type |
Surface Mount |
| Package / Case |
32-LQFP |
| Number of Pins |
32 |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tape & Reel (TR) |
| Published |
2005 |
| Series |
100EP |
| JESD-609 Code |
e3 |
| Pbfree Code |
yes |
| Part Status |
Active |
| Moisture Sensitivity Level (MSL) |
2 (1 Year) |
| Number of Terminations |
32 |
| Type |
D-Type |
| Terminal Finish |
Tin (Sn) |
| Additional Feature |
NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V |
| Subcategory |
FF/Latches |
| Packing Method |
TR |
| Technology |
ECL |
| Voltage - Supply |
-3V~-5.5V |
| Terminal Position |
QUAD |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
3.3V |
| Terminal Pitch |
0.8mm |
| Time@Peak Reflow Temperature-Max (s) |
40 |
| Base Part Number |
100EP131 |
| Function |
Set(Preset) and Reset |
| Qualification Status |
Not Qualified |
| Output Type |
Differential |
| Number of Elements |
1 |
| Polarity |
Non-Inverting |
| Supply Voltage-Max (Vsup) |
5.5V |
| Supply Voltage-Min (Vsup) |
3V |
| Number of Circuits |
4 |
| Number of Bits |
4 |
| Clock Frequency |
3GHz |
| Propagation Delay |
600 ps |
| Turn On Delay Time |
460 ps |
| Logic Function |
AND, Flip-Flop |
| Current - Quiescent (Iq) |
120mA |
| Halogen Free |
Halogen Free |
| Trigger Type |
Positive, Negative |
| Clock Edge Trigger Type |
Positive Edge |
| Max Frequency@Nom-Sup |
3000000000Hz |
| Length |
7mm |
| Width |
7mm |
| RoHS Status |
ROHS3 Compliant |
| Lead Free |
Lead Free |
MC100EP131FAR2G Overview
The flip flop is packaged in a case of 32-LQFP. D flip flop is included in the Tape & Reel (TR)package. The output it is configured with uses Differential. There is a trigger configured with Positive, Negative. There is an electronic component mounted in the way of Surface Mount. A -3V~-5.5Vsupply voltage is required for it to operate. -40°C~85°C TAis the operating temperature. This logic flip flop is classified as type D-Type. In terms of FPGAs, it belongs to the 100EP series. You should not exceed 3GHzin the output frequency of the device. The list contains 1 elements. During its operation, it consumes 120mA quiescent energy. There have been 32 terminations. The object belongs to the 100EP131 family. A voltage of 3.3V is used to power it. Surface Mount mounts this electronic component. As you can see from the design, it has pins with 32. A Positive Edgeclock edge trigger is used in this device. It is included in FF/Latches. An electronic part with 4bits has been designed. The maximal supply voltage (Vsup) reaches 5.5V. A normal operating voltage (Vsup) should remain above 3V. Its superior flexibility is attributed to its use of 4 circuits. As a result of its reliability, this D flip flop is ideally suited for TR. In addition, you can refer to the additinal NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V of the D latch.
MC100EP131FAR2G Features
Tape & Reel (TR) package
100EP series
32 pins
4 Bits
MC100EP131FAR2G Applications
There are a lot of ON Semiconductor MC100EP131FAR2G Flip Flops applications.
- Data transfer
- Counters
- Frequency Divider circuits
- Automotive
- Supports Live Insertion
- Computing
- Patented noise
- Data storage
- Test & Measurement
- Pattern generators