| Parameters |
| Lead Free |
Lead Free |
| Factory Lead Time |
8 Weeks |
| Mount |
Surface Mount |
| Mounting Type |
Surface Mount |
| Package / Case |
100-LQFP |
| Number of Pins |
100 |
| Supplier Device Package |
100-TQFP (14x14) |
| Weight |
657.000198mg |
| Operating Temperature |
0°C~90°C TJ |
| Packaging |
Tray |
| Published |
2000 |
| Series |
ispMACH® 4000V |
| Part Status |
Active |
| Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
| Max Operating Temperature |
90°C |
| Min Operating Temperature |
0°C |
| Frequency |
454.5MHz |
| Base Part Number |
LC4064 |
| Operating Supply Voltage |
3.3V |
| Programmable Type |
In System Programmable |
| Max Supply Voltage |
3.6V |
| Min Supply Voltage |
3V |
| Operating Supply Current |
12mA |
| Number of I/O |
64 |
| Memory Type |
EEPROM |
| Propagation Delay |
2.5 ns |
| Turn On Delay Time |
2.5 ns |
| Number of Logic Elements/Cells |
36 |
| Max Frequency |
400MHz |
| Number of Logic Blocks (LABs) |
4 |
| Number of Macro Cells |
64 |
| Voltage Supply - Internal |
3V~3.6V |
| Delay Time tpd(1) Max |
2.5ns |
| Number of Logic Elements/Blocks |
4 |
| Radiation Hardening |
No |
| RoHS Status |
ROHS3 Compliant |
LC4064V-25TN100C Overview
There are 64 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).There is a 100-LQFP package containing it.In this case, there are 64 I/Os programmed.It is recommended to package the chip by Tray.A reliable operation is ensured by the operating temperature of [0].It is recommended that the chip be mounted by Surface Mount.It is a type of FPGA belonging to the ispMACH? 4000V series.LC4064contains its related parts.In order to achieve high efficiency, the supply voltage should be maintained at [0].It is recommended to store data in [0].The electronic part is mounted by Surface Mount.A total of 100pins are provided on this board.With a maximum supply voltage of [0], it operates.A minimum supply voltage of 3V is required for it to operate.In total, there are 4 logic elements/blocks.A frequency of 454.5MHzcan be achieved.It is recommended that the maximal frequency be lower than 400MHz.It is recommended that the operating temperature be higher than 0°C.There should be a temperature below 90°Cat the time of operation.4logic blocks (LABs) make up this circuit.A fundamental building block consists of 36logic elements/cells.
LC4064V-25TN100C Features
100-LQFP package
64 I/Os
The operating temperature of 0°C~90°C TJ
100 pins
4 logic blocks (LABs)
LC4064V-25TN100C Applications
There are a lot of Lattice Semiconductor Corporation LC4064V-25TN100C CPLDs applications.
- ToR/Aggregation/Core Switch and Router
- State machine control
- Pattern recognition
- Complex programmable logic devices
- Software-driven hardware configuration
- Voltage level translation
- Battery operated portable devices
- Bootloaders for FPGAs
- Power automation
- Protection relays