ISPLSI 5512VE-100LB388I
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 388-BBGA |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tray |
| Published | 2002 |
| Series | ispLSI® 5000VE |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 388 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | YES |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 225 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1.27mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | ISPLSI 5512 |
| Pin Count | 388 |
| JESD-30 Code | S-PBGA-B388 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 2.5/3.33.3V |
| Supply Voltage-Min (Vsup) | 3V |
| Programmable Type | In System Programmable |
| Number of I/O | 256 |
| Clock Frequency | 67MHz |
| Propagation Delay | 10 ns |
| Number of Gates | 24000 |
| Output Function | MACROCELL |
| Number of Macro Cells | 512 |
| JTAG BST | YES |
| Voltage Supply - Internal | 3V~3.6V |
| Delay Time tpd(1) Max | 10ns |
| Number of Logic Elements/Blocks | 16 |
| Height Seated (Max) | 3.25mm |
| Length | 35mm |
| Width | 35mm |
| RoHS Status | Non-RoHS Compliant |
ISPLSI 5512VE-100LB388I Overview
Currently, there are 512 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.There is a 388-BBGA package containing it.There are 256 I/Os programmed in it.Terminations of devices are set to [0].The terminal position of this electrical component is BOTTOM.It is powered from a supply voltage of 3.3V.There is a part included in Programmable Logic Devices.It is packaged in the way of Tray.In order to ensure the reliability of the device, it is designed to operate at a temperature of [0].It is recommended to mount the chip by Surface Mount.It belongs to the ispLSI? 5000VEseries of FPGAs.It has 388pins programmed.This device also displays [0].In accordance with the [0], its related parts are listed.There are 24000 gates, which are devices that acts as a building block for digital circuits. There are a total of 16 logic elements or blocks.It runs on a voltage of 2.5/3.33.3Vvolts.3.6Vis the maximum supply voltage (Vsup).It should be possible for Vsup to exceed 3Vat the supply voltage.The clock frequency of this device should not exceed 67MHz.
ISPLSI 5512VE-100LB388I Features
388-BBGA package
256 I/Os
The operating temperature of -40°C~85°C TA
388 pin count
2.5/3.33.3V power supplies
ISPLSI 5512VE-100LB388I Applications
There are a lot of Lattice Semiconductor Corporation ISPLSI 5512VE-100LB388I CPLDs applications.
- Code converters
- Cross-Matrix Switch
- Reset swapping
- DMA control
- Synchronous or asynchronous mode
- ToR/Aggregation/Core Switch and Router
- D/T registers and latches
- Multiple Clock Source Selection
- Programmable polarity
- PLC analog input modules