EPM9480RC240-15
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Published | 1994 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 240 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | 676 FLIP FLOPS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 240 |
| JESD-30 Code | S-PQFP-G240 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 5.25V |
| Power Supplies | 3.3/55V |
| Temperature Grade | COMMERCIAL |
| Supply Voltage-Min (Vsup) | 4.75V |
| Number of I/O | 175 |
| Clock Frequency | 117.6MHz |
| Propagation Delay | 16.4 ns |
| Programmable Logic Type | EE PLD |
| Number of Gates | 10000 |
| Number of Logic Blocks (LABs) | 30 |
| Output Function | MACROCELL |
| Number of Macro Cells | 480 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 4.1mm |
| Length | 32mm |
| Width | 32mm |
| RoHS Status | RoHS Compliant |
EPM9480RC240-15 Overview
A mobile phone network consists of 480macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).The device has 175inputs and outputs.The termination of a device is set to [0].This electrical part is wired with a terminal position of QUAD.It is powered by a voltage of 5V volts.It is a part of family [0].With 240pins programmed, the chip is ready to use.If you use this device, you will also find [0].There are 10000 gates, which are devices that acts as a building block for digital circuits. This device is mounted by Surface Mount.In order for the device to operate, it requires 3.3/55V power supplies.Vsup reaches 5.25Vas the maximum supply voltage.There should be a temperature above 0°Cat the time of operation.There should be a temperature below 70°Cat the time of operation.The logic block consists of 30 l logic blocks (LABs).There should be a higher supply voltage (Vsup) than 4.75V.The clock frequency of this device should not exceed 117.6MHz.There are several types of programmable logic that can be categorized as EE PLD.
EPM9480RC240-15 Features
175 I/Os
240 pin count
3.3/55V power supplies
30 logic blocks (LABs)
EPM9480RC240-15 Applications
There are a lot of Altera EPM9480RC240-15 CPLDs applications.
- Handheld digital devices
- DMA control
- Reset swapping
- Programmable power management
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- Dedicated input registers
- Code converters
- Timing control
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- POWER-SAVING MODES