| Parameters |
| Mount |
Surface Mount |
| Number of Pins |
208 |
| Published |
1994 |
| JESD-609 Code |
e0 |
| Pbfree Code |
no |
| Part Status |
Discontinued |
| Moisture Sensitivity Level (MSL) |
3 |
| Number of Terminations |
208 |
| Terminal Finish |
Tin/Lead (Sn/Pb) |
| Max Operating Temperature |
70°C |
| Min Operating Temperature |
0°C |
| HTS Code |
8542.39.00.01 |
| Subcategory |
Programmable Logic Devices |
| Technology |
CMOS |
| Terminal Position |
QUAD |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
220 |
| Supply Voltage |
5V |
| Terminal Pitch |
0.5mm |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Pin Count |
208 |
| Qualification Status |
Not Qualified |
| Operating Supply Voltage |
5V |
| Temperature Grade |
COMMERCIAL |
| Max Supply Voltage |
5.25V |
| Min Supply Voltage |
4.75V |
| Number of I/O |
132 |
| Memory Type |
EEPROM |
| Clock Frequency |
144.9MHz |
| Propagation Delay |
10.8 ns |
| Programmable Logic Type |
EE PLD |
| Number of Gates |
6000 |
| Number of Logic Blocks (LABs) |
20 |
| Output Function |
MACROCELL |
| Number of Macro Cells |
320 |
| JTAG BST |
YES |
| In-System Programmable |
YES |
| Height Seated (Max) |
4.1mm |
| Length |
28mm |
| Width |
28mm |
| RoHS Status |
RoHS Compliant |
EPM9320ARC208-10 Overview
This network has 320macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).The device is programmed with 132 I/O ports.208terminations are programmed into the device.There is a QUADterminal position on the electrical part in question.A voltage of 5Vprovides power to the device.It belongs to the family [0].There are 208 pins on the chip.A digital circuit can be constructed using 6000gates.A high level of efficiency can be achieved by maintaining the supply voltage at [0].EEPROM is adopted for storing data.This device is mounted by Surface Mount.208pins are included in its design.With a maximum supply voltage of [0], it operates.With a minimal supply voltage of [0], it operates.The operating temperature should be higher than 0°C.Temperatures should be lower than 70°C when operating.There are 20 logic blocks (LABs) in its basic building block.Ideally, its clock frequency should not exceed 144.9MHz.It is possible to classify programmable logic as EE PLD.
EPM9320ARC208-10 Features
132 I/Os
208 pin count
208 pins
20 logic blocks (LABs)
EPM9320ARC208-10 Applications
There are a lot of Altera EPM9320ARC208-10 CPLDs applications.
- Boolean function generators
- D/T registers and latches
- Handheld digital devices
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Power Meter SMPS
- State machine design
- PLC analog input modules
- DDC INTERFACE
- Reset swapping
- Digital multiplexers