| Parameters |
| Number of Terminations |
208 |
| ECCN Code |
3A991 |
| Terminal Finish |
Matte Tin (Sn) |
| Max Operating Temperature |
70°C |
| Min Operating Temperature |
0°C |
| Additional Feature |
CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| HTS Code |
8542.39.00.01 |
| Subcategory |
Programmable Logic Devices |
| Technology |
CMOS |
| Terminal Position |
QUAD |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
245 |
| Supply Voltage |
5V |
| Terminal Pitch |
0.5mm |
| Frequency |
125MHz |
| Time@Peak Reflow Temperature-Max (s) |
40 |
| Pin Count |
208 |
| Qualification Status |
Not Qualified |
| Power Supplies |
3.3/55V |
| Temperature Grade |
COMMERCIAL |
| Max Supply Voltage |
3.6V |
| Min Supply Voltage |
3V |
| Number of I/O |
164 |
| Memory Type |
EEPROM |
| Propagation Delay |
10 ns |
| Turn On Delay Time |
10 ns |
| Frequency (Max) |
128.2MHz |
| Programmable Logic Type |
EE PLD |
| Number of Gates |
5000 |
| Number of Programmable I/O |
164 |
| Number of Logic Blocks (LABs) |
16 |
| Speed Grade |
10 |
| Output Function |
MACROCELL |
| Number of Macro Cells |
256 |
| JTAG BST |
YES |
| In-System Programmable |
YES |
| Height Seated (Max) |
4.1mm |
| Length |
28mm |
| Width |
28mm |
| RoHS Status |
RoHS Compliant |
| Lead Free |
Lead Free |
| Mount |
Surface Mount |
| Package / Case |
PQFP |
| Number of Pins |
208 |
| Published |
1998 |
| JESD-609 Code |
e3 |
| Pbfree Code |
yes |
| Moisture Sensitivity Level (MSL) |
3 |
EPM7256SRC208-10N Overview
In the mobile phone network, there are 256macro cells, which are cells with high-power antennas and towers.It is part of the PQFP package.There are 164 I/Os on the board.It is programmed that device terminations will be 208 .The terminal position of this electrical component is QUAD.It is powered by a voltage of 5V volts.There is a part in the family [0].It is equipped with 208 pin count.It is also characterized by CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V.5000gates are used to construct digital circuits.Data storage is performed using [0].In this case, it is mounted by Surface Mount.The device is designed with pins [0].In this case, the maximum supply voltage is 3.6V.With a minimal supply voltage of [0], it operates.A power supply of 3.3/55Vis required to operate it.Programmable I/Os are counted up 164.In this case, 125MHzis the frequency that can be achieved.It is recommended that the operating temperature be higher than 0°C.It is recommended to keep the operating temperature below 70°C.The logic block consists of 16 l logic blocks (LABs).It is recommended that the maximal frequency be less than 0.A programmable logic type is categorized as EE PLD.
EPM7256SRC208-10N Features
PQFP package
164 I/Os
208 pin count
208 pins
3.3/55V power supplies
16 logic blocks (LABs)
EPM7256SRC208-10N Applications
There are a lot of Altera EPM7256SRC208-10N CPLDs applications.
- Portable digital devices
- Storage Cards and Storage Racks
- Field programmable gate
- LED Lighting systems
- I2C BUS INTERFACE
- PLC analog input modules
- White goods (Washing, Cold, Aircon ,...)
- PULSE WIDTH MODULATION (PWM)
- DMA control
- Voltage level translation