| Parameters |
| Radiation Hardening |
No |
| RoHS Status |
RoHS Compliant |
| Factory Lead Time |
8 Weeks |
| Mount |
Surface Mount |
| Package / Case |
FBGA |
| Number of Pins |
256 |
| Published |
1998 |
| JESD-609 Code |
e1 |
| Pbfree Code |
yes |
| Moisture Sensitivity Level (MSL) |
3 |
| Number of Terminations |
256 |
| ECCN Code |
EAR99 |
| Terminal Finish |
Tin/Silver/Copper (Sn/Ag/Cu) |
| Max Operating Temperature |
70°C |
| Min Operating Temperature |
0°C |
| Additional Feature |
YES |
| HTS Code |
8542.39.00.01 |
| Subcategory |
Programmable Logic Devices |
| Technology |
CMOS |
| Terminal Position |
BOTTOM |
| Terminal Form |
BALL |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
2.5V |
| Terminal Pitch |
1mm |
| Frequency |
166.67MHz |
| Time@Peak Reflow Temperature-Max (s) |
40 |
| Pin Count |
256 |
| Power Supplies |
1.8/3.32.5V |
| Temperature Grade |
COMMERCIAL |
| Max Supply Voltage |
3.6V |
| Min Supply Voltage |
3V |
| Number of I/O |
164 |
| Memory Type |
EEPROM |
| Propagation Delay |
7.5 ns |
| Turn On Delay Time |
7.5 ns |
| Frequency (Max) |
188.7MHz |
| Programmable Logic Type |
EE PLD |
| Number of Gates |
5000 |
| Number of Programmable I/O |
164 |
| Number of Logic Blocks (LABs) |
16 |
| Speed Grade |
7 |
| Output Function |
MACROCELL |
| Number of Macro Cells |
256 |
| JTAG BST |
YES |
| In-System Programmable |
YES |
| Height Seated (Max) |
3.5mm |
EPM7256BFC256-7N Overview
There are 256 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).FBGAis the package in which it resides.There are 164 I/Os programmed in it.There is a 256terminations set on devices.This electrical component has a terminal position of 0.The device is powered by a voltage of 2.5V volts.It is a part of family [0].It is programmed with 256 pins.If you use this device, you will also find [0].A digital circuit can be constructed using 5000gates.It is recommended to store data in [0].Surface Mountis used to mount this electronic component.256pins are included in its design.A maximum voltage of 3.6Vis required for operation.Initially, it requires a voltage of 3Vas the minimum supply voltage.This device runs on 1.8/3.32.5Vvolts of electricity.There are 164 Programmable I/Os.This frequency is 166.67MHz.The operating temperature should be higher than 0°C.A temperature less than 70°Cshould be used for operation.16logic blocks (LABs) make up this circuit.If the maximal frequency is less than [0], it should be lower than that.This kind of FPGA is composed of EE PLD.
EPM7256BFC256-7N Features
FBGA package
164 I/Os
256 pin count
256 pins
1.8/3.32.5V power supplies
16 logic blocks (LABs)
EPM7256BFC256-7N Applications
There are a lot of Altera EPM7256BFC256-7N CPLDs applications.
- Power Meter SMPS
- Complex programmable logic devices
- Handheld digital devices
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- STANDARD SERIAL INTERFACE UART
- Code converters
- Multiple DIP Switch Replacement
- Wireless Infrastructure Base Band Unit and Remote Radio Unit
- PLC analog input modules
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management