| Parameters |
| Mount |
Surface Mount |
| Package / Case |
TQFP |
| Number of Pins |
100 |
| Published |
1998 |
| JESD-609 Code |
e3 |
| Pbfree Code |
yes |
| Moisture Sensitivity Level (MSL) |
3 |
| Number of Terminations |
100 |
| Termination |
SMD/SMT |
| ECCN Code |
EAR99 |
| Terminal Finish |
Matte Tin (Sn) |
| Max Operating Temperature |
85°C |
| Min Operating Temperature |
-40°C |
| HTS Code |
8542.39.00.01 |
| Subcategory |
Programmable Logic Devices |
| Technology |
CMOS |
| Terminal Position |
QUAD |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
5V |
| Terminal Pitch |
0.5mm |
| Frequency |
149.3MHz |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Pin Count |
100 |
| Operating Supply Voltage |
5V |
| Temperature Grade |
INDUSTRIAL |
| Max Supply Voltage |
5.25V |
| Min Supply Voltage |
4.75V |
| Number of I/O |
84 |
| Memory Type |
EEPROM |
| Propagation Delay |
10 ns |
| Turn On Delay Time |
10 ns |
| Frequency (Max) |
149.3MHz |
| Programmable Logic Type |
EE PLD |
| Number of Gates |
3200 |
| Number of Programmable I/O |
84 |
| Number of Logic Blocks (LABs) |
10 |
| Output Function |
MACROCELL |
| Number of Macro Cells |
160 |
| JTAG BST |
YES |
| In-System Programmable |
YES |
| Height Seated (Max) |
1.27mm |
| Length |
14mm |
| Width |
14mm |
| Radiation Hardening |
No |
| REACH SVHC |
Unknown |
| RoHS Status |
RoHS Compliant |
| Lead Free |
Lead Free |
EPM7160STI100-10N Overview
Currently, there are 160 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.TQFPis the package in which it resides.In this case, there are 84 I/Os programmed.100terminations are programmed into the device.QUADis the terminal position of this electrical part.A voltage of 5Vprovides power to the device.It is a part of family [0].In this chip, the 100pins are programmed.The 3200gates serve as building blocks for digital circuits.Optimal efficiency requires a supply voltage of [0].In order to store data, EEPROMis used.The electronic part is mounted by Surface Mount.The device is designed with pins [0].This device operates at a voltage of 5.25Vas its maximum supply voltage.Initially, it requires a voltage of 4.75Vas the minimum supply voltage.A total of 84 Programmable I/Os are available.This frequency can be achieved at 149.3MHz.In order to operate, the temperature should be higher than -40°C.It is recommended that the operating temperature be lower than 85°C.It consists of 10 logic blocks (LABs).It should be below 149.3MHzat the maximal frequency.This kind of FPGA is composed of EE PLD.
EPM7160STI100-10N Features
TQFP package
84 I/Os
100 pin count
100 pins
10 logic blocks (LABs)
EPM7160STI100-10N Applications
There are a lot of Altera EPM7160STI100-10N CPLDs applications.
- Storage Cards and Storage Racks
- Software-driven hardware configuration
- Custom state machines
- Address decoding
- Protection relays
- Address decoders
- Field programmable gate
- State machine design
- Discrete logic functions
- Multiple Clock Source Selection