| Parameters |
| Length |
29.3116mm |
| Width |
29.3116mm |
| RoHS Status |
Non-RoHS Compliant |
| Mounting Type |
Surface Mount |
| Package / Case |
84-LCC (J-Lead) |
| Surface Mount |
YES |
| Operating Temperature |
0°C~70°C TA |
| Packaging |
Tray |
| Series |
MAX® 7000S |
| JESD-609 Code |
e0 |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
| Number of Terminations |
84 |
| Terminal Finish |
Tin/Lead (Sn/Pb) |
| HTS Code |
8542.39.00.01 |
| Subcategory |
Programmable Logic Devices |
| Technology |
CMOS |
| Terminal Position |
QUAD |
| Terminal Form |
J BEND |
| Peak Reflow Temperature (Cel) |
220 |
| Supply Voltage |
5V |
| Terminal Pitch |
1.27mm |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Base Part Number |
EPM7160 |
| JESD-30 Code |
S-PQCC-J84 |
| Qualification Status |
Not Qualified |
| Supply Voltage-Max (Vsup) |
5.25V |
| Power Supplies |
3.3/55V |
| Supply Voltage-Min (Vsup) |
4.75V |
| Programmable Type |
In System Programmable |
| Number of I/O |
64 |
| Clock Frequency |
166.7MHz |
| Propagation Delay |
6 ns |
| Number of Gates |
3200 |
| Output Function |
MACROCELL |
| Number of Macro Cells |
160 |
| JTAG BST |
YES |
| Voltage Supply - Internal |
4.75V~5.25V |
| Delay Time tpd(1) Max |
6ns |
| Number of Logic Elements/Blocks |
10 |
| Height Seated (Max) |
5.08mm |
EPM7160SLC84-6 Overview
Currently, there are 160 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.You can find it in package [0].This device has 64 I/O ports programmed into it.84terminations have been programmed into the device.As the terminal position of this electrical part is [0], it serves as an important access point for passengers or freight.There is 5V voltage supply for this device.It is a part of the family [0].It is recommended that the chip be packaged by Tray.To ensure its reliability, the operating temperature is set to [0].Ideally, the chip should be mounted by Surface Mount.It is a type of FPGA belonging to the MAX? 7000S series.There are related parts in [0].A digital circuit is built using 3200gates.10logic blocks/elements are present.A power supply of 3.3/55Vvolts is required to operate this device.Vsup reaches 5.25Vas the maximum supply voltage.Voltage supply (Vsup) should be higher than 4.75V.A frequency of 166.7MHzshould not be exceeded by its clock.
EPM7160SLC84-6 Features
84-LCC (J-Lead) package
64 I/Os
The operating temperature of 0°C~70°C TA
3.3/55V power supplies
EPM7160SLC84-6 Applications
There are a lot of Intel EPM7160SLC84-6 CPLDs applications.
- DDC INTERFACE
- Digital multiplexers
- Digital designs
- Page register
- TIMERS/COUNTERS
- White goods (Washing, Cold, Aircon ,...)
- Software-Driven Hardware Configuration
- Parity generators
- Discrete logic functions
- Complex programmable logic devices