EPM7128STI100-10N
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | TQFP |
| Number of Pins | 100 |
| Weight | 657.000198mg |
| Published | 1998 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 100 |
| Termination | SMD/SMT |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin (Sn) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.5mm |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 100 |
| Operating Supply Voltage | 5V |
| Temperature Grade | INDUSTRIAL |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Number of I/O | 84 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 147.1MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 2500 |
| Number of Logic Blocks (LABs) | 8 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height | 1mm |
| Length | 14mm |
| Width | 14mm |
| Radiation Hardening | No |
| REACH SVHC | Unknown |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
EPM7128STI100-10N Overview
There are 128 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.It is part of the TQFP package.The device has 84inputs and outputs.Terminations of devices are set to [0].This electrical part has a terminal position of QUADand is connected to the ground.There is 5V voltage supply for this device.There is a part in the family [0].There are 100pins on the chip.This device can also display [0].A digital circuit is built using 2500gates.High efficiency requires a voltage supply of [0].It is recommended to store data in [0].This device is mounted by Surface Mount.There are 100 pins embedded in the device.There is a maximum supply voltage of 5.5Vwhen the device is operating.The device is designed to operate with a minimal supply voltage of 4.5VV.This frequency can be achieved at 125MHz.Operating temperatures should be higher than 0°C.A temperature less than 85°Cshould be used for operation.It is composed of 8 logic blocks (LABs).It should be below 147.1MHzat the maximal frequency.A programmable logic type is classified as EE PLD.
EPM7128STI100-10N Features
TQFP package
84 I/Os
100 pin count
100 pins
8 logic blocks (LABs)
EPM7128STI100-10N Applications
There are a lot of Altera EPM7128STI100-10N CPLDs applications.
- DDC INTERFACE
- Bootloaders for FPGAs
- Handheld digital devices
- Custom state machines
- State machine design
- ROM patching
- ToR/Aggregation/Core Switch and Router
- Programmable polarity
- Reset swapping
- Multiple Clock Source Selection