| Parameters |
| Factory Lead Time |
12 Weeks |
| Mount |
Surface Mount |
| Package / Case |
PQFP |
| Number of Pins |
100 |
| Published |
2008 |
| JESD-609 Code |
e3 |
| Pbfree Code |
yes |
| Part Status |
Discontinued |
| Moisture Sensitivity Level (MSL) |
3 |
| Number of Terminations |
100 |
| ECCN Code |
EAR99 |
| Terminal Finish |
MATTE TIN (472) OVER COPPER |
| Max Operating Temperature |
70°C |
| Min Operating Temperature |
0°C |
| Additional Feature |
YES |
| Subcategory |
Programmable Logic Devices |
| Technology |
CMOS |
| Terminal Position |
QUAD |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
245 |
| Supply Voltage |
5V |
| Terminal Pitch |
0.65mm |
| Frequency |
100MHz |
| Time@Peak Reflow Temperature-Max (s) |
40 |
| Pin Count |
100 |
| Qualification Status |
Not Qualified |
| Operating Supply Voltage |
3.3V |
| Power Supplies |
3.3/55V |
| Temperature Grade |
COMMERCIAL |
| Max Supply Voltage |
3.6V |
| Min Supply Voltage |
3V |
| Number of I/O |
84 |
| Memory Type |
EEPROM |
| Propagation Delay |
15 ns |
| Turn On Delay Time |
15 ns |
| Frequency (Max) |
147.1MHz |
| Programmable Logic Type |
EE PLD |
| Number of Gates |
2500 |
| Number of Programmable I/O |
84 |
| Number of Logic Blocks (LABs) |
8 |
| Output Function |
MACROCELL |
| Number of Macro Cells |
128 |
| JTAG BST |
YES |
| In-System Programmable |
YES |
| Height Seated (Max) |
3.65mm |
| Length |
20mm |
| Width |
14mm |
| RoHS Status |
RoHS Compliant |
EPM7128SQC100-15FN Overview
In the mobile phone network, there are 128macro cells, which are cells with high-power antennas and towers.The product is contained in a PQFP package.This device has 84 I/O ports programmed into it.It is programmed that device terminations will be 100 .Its terminal position is QUAD.It is powered by a voltage of 5V volts.This part is in the family [0].There are 100 pins on the chip.The device can also be used to find [0].A digital circuit is built using 2500gates.For high efficiency, the supply voltage should be maintained at [0].In order to store data, EEPROMis used.The electronic component is mounted by Surface Mount.The device is designed with pins [0].With a maximum supply voltage of [0], it operates.A minimum supply voltage of 3V is required for this device to operate.It runs on 3.3/55Vvolts of power.In total, there are 84programmable I/Os.In this case, 100MHzis the frequency that can be achieved.It is recommended that the operating temperature exceeds 0°C.A temperature lower than 70°Cis recommended for operation.The program consists of 8 logic blocks (LABs).It is recommended that the maximum frequency is less than 0.This kind of FPGA is composed of EE PLD.
EPM7128SQC100-15FN Features
PQFP package
84 I/Os
100 pin count
100 pins
3.3/55V power supplies
8 logic blocks (LABs)
EPM7128SQC100-15FN Applications
There are a lot of Altera EPM7128SQC100-15FN CPLDs applications.
- Field programmable gate
- Interface bridging
- PLC analog input modules
- Battery operated portable devices
- Address decoders
- Auxiliary Power Supply Isolated and Non-isolated
- I2C BUS INTERFACE
- Custom shift registers
- Digital systems
- Wide Vin Industrial low power SMPS