| Parameters |
| Factory Lead Time |
12 Weeks |
| Mount |
Surface Mount |
| Package / Case |
PLCC |
| Number of Pins |
44 |
| Published |
1998 |
| JESD-609 Code |
e0 |
| Pbfree Code |
no |
| Part Status |
Discontinued |
| Moisture Sensitivity Level (MSL) |
1 |
| Number of Terminations |
44 |
| Terminal Finish |
Tin/Lead (Sn/Pb) |
| Max Operating Temperature |
70°C |
| Min Operating Temperature |
0°C |
| Additional Feature |
YES |
| Subcategory |
Programmable Logic Devices |
| Technology |
CMOS |
| Terminal Position |
QUAD |
| Terminal Form |
J BEND |
| Peak Reflow Temperature (Cel) |
220 |
| Supply Voltage |
5V |
| Terminal Pitch |
1.27mm |
| Frequency |
166.7MHz |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Pin Count |
44 |
| Operating Supply Voltage |
5V |
| Power Supplies |
5V |
| Temperature Grade |
COMMERCIAL |
| Max Supply Voltage |
5.25V |
| Min Supply Voltage |
4.75V |
| Number of I/O |
36 |
| Memory Type |
EEPROM |
| Propagation Delay |
7.5 ns |
| Turn On Delay Time |
7.5 ns |
| Frequency (Max) |
175.4MHz |
| Programmable Logic Type |
EE PLD |
| Number of Gates |
1250 |
| Number of Programmable I/O |
36 |
| Number of Logic Blocks (LABs) |
4 |
| Output Function |
MACROCELL |
| Number of Macro Cells |
64 |
| JTAG BST |
YES |
| In-System Programmable |
YES |
| Length |
16.5862mm |
| Width |
16.5862mm |
| Radiation Hardening |
No |
| RoHS Status |
RoHS Compliant |
| Lead Free |
Contains Lead |
EPM7064SLC44-7 Overview
There are 64 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.There is a PLCC package containing it.It is equipped with 36I/O ports.There are 44 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.This electrical part has a terminal position of QUADand is connected to the ground.Power is provided by a supply voltage of 5V volts.There is a part included in Programmable Logic Devices.44pins are programmed on the chip.This device can also display [0].As a building block for digital circuits, there are 1250gates.High efficiency requires the supply voltage to be maintained at [0].It is recommended that data be stored in [0].It is mounted by Surface Mount.The device has a pinout of [0].There is a maximum supply voltage of 5.25Vwhen the device is operating.A minimum supply voltage of 4.75V is required for this device to operate.It operates from 5V power supplies.There are 36 Programmable I/Os.There can be 166.7MHz frequency achieved.It is recommended that the operating temperature exceeds 0°C.Temperatures should be lower than 70°C when operating.4logic blocks (LABs) make up this circuit.It is recommended that the maximal frequency be less than 0.Programmable logic types can be divided into EE PLD.
EPM7064SLC44-7 Features
PLCC package
36 I/Os
44 pin count
44 pins
5V power supplies
4 logic blocks (LABs)
EPM7064SLC44-7 Applications
There are a lot of Altera EPM7064SLC44-7 CPLDs applications.
- Software Configuration of Add-In Boards
- Power up sequencing
- Multiple DIP Switch Replacement
- D/T registers and latches
- Protection relays
- Wide Vin Industrial low power SMPS
- Preset swapping
- Page register
- State machine control
- TIMERS/COUNTERS