EPM7064QC100-10
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 100-BQFP |
| Surface Mount | YES |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tray |
| Series | MAX® 7000 |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 100 |
| Terminal Finish | TIN LEAD |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Reach Compliance Code | compliant |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | EPM7064 |
| JESD-30 Code | R-PQFP-G100 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 5.25V |
| Power Supplies | 3.3/55V |
| Programmable Type | EE PLD |
| Number of I/O | 68 |
| Clock Frequency | 125MHz |
| Propagation Delay | 10 ns |
| Number of Gates | 1250 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | NO |
| Voltage Supply - Internal | 4.75V~5.25V |
| Delay Time tpd(1) Max | 10ns |
| Number of Logic Elements/Blocks | 4 |
| Height Seated (Max) | 3.65mm |
| Length | 20mm |
| RoHS Status | Non-RoHS Compliant |
EPM7064QC100-10 Overview
Currently, there are 64 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.In the 100-BQFPpackage, you will find it.There are 68 I/Os on the board.100terminations have been programmed into the device.The terminal position of this electrical component is QUAD.Power is provided by a supply voltage of 5V volts.There is a part in the family [0].Trayis the packaging method.In order to ensure the reliability of the device, it is designed to operate at a temperature of [0].Chips should be mounted by Surface Mount.The FPGA belongs to the MAX? 7000 series.This device can also display [0].The EPM7064shows its related parts.A digital circuit can be constructed using 1250gates.There are 4 logic elements/blocks, which are fundamental building blocks of field-programmable gate array (FPGA) technology.In order for the device to operate, it requires 3.3/55V power supplies.Supply voltage (Vsup) reaches a maximum of 5.25V.Ideally, its clock frequency should not exceed 125MHz.
EPM7064QC100-10 Features
100-BQFP package
68 I/Os
The operating temperature of 0°C~70°C TA
3.3/55V power supplies
EPM7064QC100-10 Applications
There are a lot of Intel EPM7064QC100-10 CPLDs applications.
- Digital multiplexers
- Synchronous or asynchronous mode
- PULSE WIDTH MODULATION (PWM)
- Programmable polarity
- Multiple DIP Switch Replacement
- ROM patching
- Portable digital devices
- Custom shift registers
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- Preset swapping