EPM7064LC84-7
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | PLCC |
| Number of Pins | 84 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 2 |
| Number of Terminations | 84 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Frequency | 166.7MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 84 |
| Qualification Status | Not Qualified |
| Power Supplies | 3.3/55V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 7.5 ns |
| Turn On Delay Time | 7.5 ns |
| Frequency (Max) | 151.5MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1250 |
| Number of Programmable I/O | 68 |
| Number of Logic Blocks (LABs) | 4 |
| Speed Grade | 7 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | NO |
| In-System Programmable | NO |
| Height Seated (Max) | 5.08mm |
| Length | 29.3116mm |
| Width | 29.3116mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Contains Lead |
EPM7064LC84-7 Overview
Currently, there are 64 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.It is contained in package [0].In this case, there are 68 I/Os programmed.It is programmed to terminate devices at [0].Its terminal position is QUAD.A voltage of 5V is used as the power supply for this device.There is a part in the family [0].With 84pins programmed, the chip is ready to use.When using this device, CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vis also available.For digital circuits, there are 1250gates. These devices serve as building blocks.It is adopted to store data in [0].This electronic part is mounted in the way of Surface Mount.There are 84 pins on the device.With a maximum supply voltage of [0], it operates.Normally, it operates with a voltage of 3VV as its minimum supply voltage.It runs on a voltage of 3.3/55Vvolts.There are 68 Programmable I/Os.This frequency is 166.7MHz.Ideally, the operating temperature should be greater than 0°C.Temperatures should be lower than 70°C when operating.4logic blocks (LABs) make up this circuit.It is recommended that the maximum frequency be less than 151.5MHz.A programmable logic type can be categorized as EE PLD.
EPM7064LC84-7 Features
PLCC package
68 I/Os
84 pin count
84 pins
3.3/55V power supplies
4 logic blocks (LABs)
EPM7064LC84-7 Applications
There are a lot of Altera EPM7064LC84-7 CPLDs applications.
- Synchronous or asynchronous mode
- State machine control
- I/O PORTS (MCU MODULE)
- Battery operated portable devices
- Programmable polarity
- Portable digital devices
- I2C BUS INTERFACE
- Address decoding
- Digital multiplexers
- DMA control