EPM7064LC44-12
| Parameters | |
|---|---|
| Factory Lead Time | 12 Weeks |
| Mount | Surface Mount |
| Package / Case | PLCC |
| Number of Pins | 44 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Moisture Sensitivity Level (MSL) | 1 |
| Number of Terminations | 44 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 44 |
| Power Supplies | 5V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 36 |
| Memory Type | EEPROM |
| Propagation Delay | 12 ns |
| Turn On Delay Time | 12 ns |
| Frequency (Max) | 151.5MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1250 |
| Number of Programmable I/O | 36 |
| Number of Logic Blocks (LABs) | 4 |
| Speed Grade | 12 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | NO |
| In-System Programmable | NO |
| Length | 16.5862mm |
| Width | 16.5862mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
EPM7064LC44-12 Overview
There are 64 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).It is part of the PLCC package.The device is programmed with 36 I/Os.The device is programmed with 44 terminations.QUADis the terminal position of this electrical part.The power source is powered by 5Vvolts.It belongs to the family [0].There are 44pins on the chip.For digital circuits, there are 1250gates. These devices serve as building blocks.For storing data, it is recommended to use [0].The electronic part is mounted by Surface Mount.There are 44 pins on the device.In this case, the maximum supply voltage is 3.6V.Normally, it operates with a voltage of 3VV as its minimum supply voltage.It runs on 5Vvolts of power.In total, there are 36programmable I/Os.There can be 125MHz frequency achieved.There should be a temperature above 0°Cat the time of operation.The operating temperature should be lower than 70°C.It is composed of 4 logic blocks (LABs).The maximal frequency should be lower than 151.5MHz.A programmable logic type is classified as EE PLD.
EPM7064LC44-12 Features
PLCC package
36 I/Os
44 pin count
44 pins
5V power supplies
4 logic blocks (LABs)
EPM7064LC44-12 Applications
There are a lot of Altera EPM7064LC44-12 CPLDs applications.
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- I2C BUS INTERFACE
- Portable digital devices
- Power Meter SMPS
- PLC analog input modules
- Bootloaders for FPGAs
- Software Configuration of Add-In Boards
- Power automation
- Storage Cards and Storage Racks
- Page register