EPM7064AEFC100-10
| Parameters | |
|---|---|
| Factory Lead Time | 10 Weeks |
| Mount | Surface Mount |
| Package / Case | FBGA |
| Number of Pins | 100 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 100 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn63Pb37) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 235 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1mm |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 100 |
| Operating Supply Voltage | 3.3V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 222.2MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1250 |
| Number of Programmable I/O | 68 |
| Number of Logic Blocks (LABs) | 4 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 1.7mm |
| Length | 11mm |
| Width | 11mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
EPM7064AEFC100-10 Overview
There are 64 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).There is a FBGA package containing it.There are 68 I/Os programmed in it.It is programmed that device terminations will be 100 .This electrical part has a terminal position of BOTTOMand is connected to the ground.There is 3.3V voltage supply for this device.There is a part in the family [0].There are 100 pins on the chip.In digital circuits, there are 1250gates, which act as a basic building block.It is recommended that the supply voltage be kept at 3.3Vto maximize efficiency.For storing data, it is recommended to use [0].In this case, Surface Mountis used to mount the electronic component.There are 100 pins on the device.In this case, the maximum supply voltage is 3.6V.Initially, it requires a voltage of 3Vas the minimum supply voltage.Programmable I/Os are counted up 68.You can achieve 125MHzfrequencies.In order to operate, the temperature should be higher than 0°C.Temperatures should be lower than 70°C when operating.In total, it contains 4 logic blocks (LABs).The maximal frequency should be lower than 222.2MHz.A programmable logic type is classified as EE PLD.
EPM7064AEFC100-10 Features
FBGA package
68 I/Os
100 pin count
100 pins
4 logic blocks (LABs)
EPM7064AEFC100-10 Applications
There are a lot of Altera EPM7064AEFC100-10 CPLDs applications.
- Handheld digital devices
- ON-CHIP OSCILLATOR CIRCUIT
- Software-driven hardware configuration
- Preset swapping
- Random logic replacement
- Digital designs
- State machine control
- Address decoders
- Boolean function generators
- Protection relays