CY74FCT16823ATPACT
| Parameters | |
|---|---|
| Factory Lead Time | 6 Weeks |
| Mounting Type | Surface Mount |
| Package / Case | 56-TFSOP (0.240, 6.10mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74FCT |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 56 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74FCT16823 |
| JESD-30 Code | R-PDSO-G56 |
| Function | Master Reset |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 2 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Family | FCT |
| Current - Quiescent (Iq) | 500μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 64mA |
| Output Polarity | TRUE |
| Max I(ol) | 0.064 A |
| Number of Bits per Element | 9 |
| Max Propagation Delay @ V, Max CL | 20ns @ 5V, 300pF |
| Prop. Delay@Nom-Sup | 10 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Power Supply Current-Max (ICC) | 0.5mA |
| Count Direction | UNIDIRECTIONAL |
| Translation | N/A |
| Length | 14mm |
| Width | 6.1mm |
| RoHS Status | ROHS3 Compliant |
CY74FCT16823ATPACT Overview
It is packaged in the way of 56-TFSOP (0.240, 6.10mm Width). It is included in the package Tape & Reel (TR). T flip flop is configured with an output of Tri-State, Non-Inverted. This trigger is configured to use Positive Edge. Surface Mountis positioned in the way of this electronic part. A supply voltage of 4.5V~5.5V is required for operation. In this case, the operating temperature is -40°C~85°C TA. D-Typedescribes this flip flop. FPGAs belonging to the 74FCTseries contain this type of chip. D latch consists of 2 elements. Despite external influences, it consumes 500μAof quiescent current. Currently, there are 56 terminations. JK flip flop belongs to 74FCT16823 family. A voltage of 5V is used as the power supply for this D latch. Its input capacitance is 4.5pF farads. Electronic devices of this type belong to the FCTfamily. This device is part of the FF/Latchesbase part number family. As soon as 5.5Vis reached, Vsup reaches its maximum value. Normal operation requires a supply voltage (Vsup) above 4.5V. Due to its reliability, this T flip flop is well suited for TR. It runs on 5Vvolts of power. This D flip flop is equipped with 0 ports.
CY74FCT16823ATPACT Features
Tape & Reel (TR) package
74FCT series
5V power supplies
CY74FCT16823ATPACT Applications
There are a lot of Texas Instruments CY74FCT16823ATPACT Flip Flops applications.
- Supports Live Insertion
- ESD performance
- CMOS Process
- Shift registers
- Shift Registers
- Latch
- Communications
- ESD protection
- Consumer
- Storage Registers