74LVX273MX
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVX |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Technology | CMOS |
| Voltage - Supply | 2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDSO-G20 |
| Function | Master Reset |
| Qualification Status | COMMERCIAL |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 2V |
| Clock Frequency | 90MHz |
| Family | LV/LV-A/LVX/H |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 4mA 4mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 14.5ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Propagation Delay (tpd) | 24 ns |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| RoHS Status | ROHS3 Compliant |
74LVX273MX Overview
The package is in the form of 20-SOIC (0.295, 7.50mm Width). It is contained within the Tape & Reel (TR)package. Currently, the output is configured to use Non-Inverted. There is a trigger configured with Positive Edge. It is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 2V~3.6V. A temperature of -40°C~85°C TAis used in the operation. It belongs to the type D-Typeof flip flops. In this case, it is a type of FPGA belonging to the 74LVX series. It should not exceed 90MHzin its output frequency. In total, there are 1 elements. It consumes 4μA of quiescent A total of 20 terminations have been made. The D flip flop is powered by a voltage of 2.7V . This T flip flop has a capacitance of 4pF farads at the input. A device of this type belongs to the family of LV/LV-A/LVX/H. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. A normal operating voltage (Vsup) should remain above 2V.
74LVX273MX Features
Tape & Reel (TR) package
74LVX series
74LVX273MX Applications
There are a lot of Rochester Electronics, LLC 74LVX273MX Flip Flops applications.
- Memory
- Buffered Clock
- Single Up Count-Control Line
- Supports Live Insertion
- Set-reset capability
- Data transfer
- Synchronous counter
- ESD performance
- Computing
- Memory