| Parameters |
| Mounting Type |
Surface Mount |
| Package / Case |
96-LFBGA |
| Surface Mount |
YES |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tray |
| Series |
74LVT |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
2 (1 Year) |
| Number of Terminations |
96 |
| Type |
D-Type |
| Technology |
BICMOS |
| Voltage - Supply |
2.7V~3.6V |
| Terminal Position |
BOTTOM |
| Terminal Form |
BALL |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
3.3V |
| Reach Compliance Code |
unknown |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Base Part Number |
74LVT32374 |
| JESD-30 Code |
R-PBGA-B96 |
| Function |
Standard |
| Qualification Status |
Not Qualified |
| Output Type |
Tri-State, Non-Inverted |
| Number of Elements |
4 |
| Supply Voltage-Max (Vsup) |
3.6V |
| Supply Voltage-Min (Vsup) |
2.7V |
| Number of Ports |
2 |
| Clock Frequency |
150MHz |
| Family |
LVT |
| Current - Quiescent (Iq) |
240μA |
| Output Characteristics |
3-STATE |
| Current - Output High, Low |
32mA 64mA |
| Output Polarity |
TRUE |
| Number of Bits per Element |
8 |
| Max Propagation Delay @ V, Max CL |
5.3ns @ 3.3V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
3pF |
| Propagation Delay (tpd) |
6.2 ns |
| Height Seated (Max) |
1.5mm |
| Length |
13.5mm |
| Width |
5.5mm |
| RoHS Status |
ROHS3 Compliant |
74LVT32374EC/G,518 Overview
The flip flop is packaged in 96-LFBGA. It is included in the package Tray. As configured, the output uses Tri-State, Non-Inverted. This trigger is configured to use Positive Edge. Surface Mountis positioned in the way of this electronic part. The supply voltage is set to 2.7V~3.6V. In this case, the operating temperature is -40°C~85°C TA. There is D-Type type of electronic flip flop associated with this device. The FPGA belongs to the 74LVT series. This D flip flop should not have a frequency greater than 150MHz. There are 4 elements in it. This process consumes 240μA quiescents. Terminations are 96. The 74LVT32374 family contains it. It is powered from a supply voltage of 3.3V. A JK flip flop with a 3pFfarad input capacitance is used here. It is a member of the LVTfamily of D flip flop. There is a 3.6Vmaximum supply voltage (Vsup). The supply voltage (Vsup) should be kept above 2.7V for normal operation. The flip flop has 2embedded ports.
74LVT32374EC/G,518 Features
Tray package
74LVT series
74LVT32374EC/G,518 Applications
There are a lot of NXP USA Inc. 74LVT32374EC/G,518 Flip Flops applications.
- Control circuits
- Counters
- Frequency Dividers
- Synchronous counter
- Set-reset capability
- Common Clocks
- Buffer registers
- QML qualified product
- Communications
- ESD performance