74LVQ374SC
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 20 |
| Supplier Device Package | 20-SOIC |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LVQ |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Voltage - Supply | 2V~3.6V |
| Frequency | 75MHz |
| Base Part Number | 74LVQ374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Number of Circuits | 8 |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 2V |
| Number of Bits | 8 |
| Clock Frequency | 75MHz |
| Propagation Delay | 18.3 ns |
| Turn On Delay Time | 9.5 ns |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 40μA |
| Current - Output High, Low | 12mA 12mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 13ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| High Level Output Current | -12mA |
| Input Capacitance | 4.5pF |
| Low Level Output Current | 12mA |
| Number of Input Lines | 1 |
| Number of Output Lines | 3 |
| Clock Edge Trigger Type | Positive Edge |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
74LVQ374SC Overview
20-SOIC (0.295, 7.50mm Width)is the way it is packaged. The package Tubecontains it. The output it is configured with uses Tri-State, Non-Inverted. It is configured with the trigger Positive Edge. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates at 2V~3.6Vvolts. A temperature of -40°C~85°C TAis considered to be the operating temperature. D-Typedescribes this flip flop. The FPGA belongs to the 74LVQ series. There should be no greater frequency than 75MHzon its output. In total, it contains 1 elements. During its operation, it consumes 40μA quiescent energy. JK flip flop belongs to 74LVQ374 family. There is 4.5pF input capacitance for this T flip flop. There is an electronic part mounted in the way of Surface Mount. As you can see from the design, it has pins with 20. This device exhibits a clock edge trigger type of Positive Edge. It is designed with a number of bits of 8. Due to its superior flexibility, it uses 8 circuits. There are no output lines on the JK flip flop. As of now, there are 1input lines. The high level output current is set to -12mA. A 12mAvalue is set for low-level output current. If the operating temperature is lower than 85°C, it is recommended. Ideally, the operating temperature should be greater than -40°C. The minimum voltage required for operation is 2V. It is capable of supporting a maximum supply voltage of 3.6V. It is possible to achieve 75MHz frequencies.
74LVQ374SC Features
Tube package
74LVQ series
20 pins
8 Bits
74LVQ374SC Applications
There are a lot of ON Semiconductor 74LVQ374SC Flip Flops applications.
- Consumer
- Buffer registers
- Common Clocks
- Storage Registers
- Control circuits
- ESD performance
- Test & Measurement
- Functionally equivalent to the MC10/100EL29
- Patented noise
- ESD protection