74HC109N,652
| Parameters | |
|---|---|
| Mounting Type | Through Hole |
| Package / Case | 16-DIP (0.300, 7.62mm) |
| Surface Mount | NO |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Published | 1997 |
| Series | 74HC |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | JK Type |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Subcategory | FF/Latches |
| Packing Method | BULK PACK |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 4.5V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74HC109 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 2 |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Load Capacitance | 50pF |
| Clock Frequency | 81MHz |
| Family | HC/UH |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 5.2mA 5.2mA |
| Output Polarity | COMPLEMENTARY |
| Max I(ol) | 0.004 A |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 30ns @ 6V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Height Seated (Max) | 4.7mm |
| RoHS Status | ROHS3 Compliant |
74HC109N,652 Overview
The package is in the form of 16-DIP (0.300, 7.62mm). There is an embedded version in the package Tube. It is configured with Differentialas an output. It is configured with a trigger that uses a value of Positive Edge. The electronic part is mounted in the way of Through Hole. Powered by a 2V~6Vvolt supply, it operates as follows. Temperature is set to -40°C~125°C TA. JK Typedescribes this flip flop. FPGAs belonging to the 74HCseries contain this type of chip. This D flip flop should not have a frequency greater than 81MHz. There are 2 elements in it. As a result, it consumes 4μA of quiescent current without being affected by external factors. There are 16 terminations,The object belongs to the 74HC109 family. Power is provided by a 4.5V supply. A JK flip flop with a 3.5pFfarad input capacitance is used here. It is a member of the HC/UHfamily of D flip flop. This part is included in FF/Latches. It reaches 6Vwhen the supply voltage is maximal (Vsup). The supply voltage (Vsup) should be kept above 2V for normal operation. A reliable performance of this D flip flop makes it well suited for use in BULK PACK.
74HC109N,652 Features
Tube package
74HC series
74HC109N,652 Applications
There are a lot of NXP USA Inc. 74HC109N,652 Flip Flops applications.
- Frequency Divider circuits
- ESD performance
- Functionally equivalent to the MC10/100EL29
- QML qualified product
- Common Clocks
- Differential Individual
- Consumer
- High Performance Logic for test systems
- Counters
- EMI reduction circuitry