74ACTQ374SCX
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74ACTQ |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Number of Ports | 2 |
| Clock Frequency | 85MHz |
| Family | ACT |
| Current - Quiescent (Iq) | 40μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 9ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Propagation Delay (tpd) | 9.5 ns |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| RoHS Status | ROHS3 Compliant |
74ACTQ374SCX Overview
The item is packaged in 20-SOIC (0.295, 7.50mm Width)cases. A package named Tape & Reel (TR)includes it. T flip flop uses Tri-State, Non-Invertedas the output. In the configuration of the trigger, Positive Edgeis used. It is mounted in the way of Surface Mount. The supply voltage is set to 4.5V~5.5V. In this case, the operating temperature is -40°C~85°C TA. This electronic flip flop is of type D-Type. This type of FPGA is a part of the 74ACTQ series. A frequency of 85MHzshould be the maximum output frequency. In total, it contains 1 elements. As a result, it consumes 40μA quiescent current. Terminations are 20. A voltage of 5V is used as the power supply for this D latch. JK flip flop input capacitance is 4.5pF farads. In terms of electronic devices, this device belongs to the ACTfamily of devices. There is a 5.5Vmaximum supply voltage (Vsup). The supply voltage (Vsup) should be kept above 4.5V for normal operation. This D flip flop is equipped with 0 ports.
74ACTQ374SCX Features
Tape & Reel (TR) package
74ACTQ series
74ACTQ374SCX Applications
There are a lot of Rochester Electronics, LLC 74ACTQ374SCX Flip Flops applications.
- Asynchronous counter
- Storage registers
- Cold spare funcion
- ATE
- Storage Registers
- Memory
- Synchronous counter
- Data Synchronizers
- Parallel data storage
- Computers