| Parameters |
| Current - Output High, Low |
24mA 24mA |
| Output Polarity |
COMPLEMENTARY |
| Number of Bits per Element |
4 |
| Max Propagation Delay @ V, Max CL |
11ns @ 5V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
4.5pF |
| Length |
9.9mm |
| Width |
3.9mm |
| RoHS Status |
ROHS3 Compliant |
| Mounting Type |
Surface Mount |
| Package / Case |
16-SOIC (0.154, 3.90mm Width) |
| Surface Mount |
YES |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tape & Reel (TR) |
| Published |
1996 |
| Series |
74ACT |
| JESD-609 Code |
e3 |
| Pbfree Code |
yes |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
16 |
| Type |
D-Type |
| Terminal Finish |
MATTE TIN |
| Technology |
CMOS |
| Voltage - Supply |
4.5V~5.5V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
5V |
| Reach Compliance Code |
unknown |
| Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
| Function |
Master Reset |
| Qualification Status |
Not Qualified |
| Output Type |
Differential |
| Number of Elements |
1 |
| Supply Voltage-Max (Vsup) |
5.5V |
| Clock Frequency |
236MHz |
| Family |
ACT |
| Current - Quiescent (Iq) |
40μA |
74ACT175SCX Overview
The flip flop is packaged in a case of 16-SOIC (0.154, 3.90mm Width). It is included in the package Tape & Reel (TR). There is a Differentialoutput configured with it. The trigger configured with it uses Positive Edge. The electronic part is mounted in the way of Surface Mount. A voltage of 4.5V~5.5Vis used as the supply voltage. It is operating at a temperature of -40°C~85°C TA. It belongs to the type D-Typeof flip flops. This type of FPGA is a part of the 74ACT series. You should not exceed 236MHzin the output frequency of the device. The element count is 1 . As a result, it consumes 40μA quiescent current and is not affected by external forces. In 16terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. A voltage of 5V is used to power it. The input capacitance of this T flip flop is 4.5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. In this case, the D flip flop belongs to the ACTfamily. In this case, the maximum supply voltage (Vsup) reaches 5.5V.
74ACT175SCX Features
Tape & Reel (TR) package
74ACT series
74ACT175SCX Applications
There are a lot of Rochester Electronics, LLC 74ACT175SCX Flip Flops applications.
- ESD protection
- Control circuits
- Frequency Divider circuits
- Computing
- Frequency Dividers
- Pattern generators
- CMOS Process
- Power down protection
- Bus hold
- Guaranteed simultaneous switching noise level