| Parameters |
| Mounting Type |
Through Hole |
| Package / Case |
20-DIP (0.300, 7.62mm) |
| Surface Mount |
NO |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tube |
| Series |
74AC |
| JESD-609 Code |
e3 |
| Pbfree Code |
yes |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
| Number of Terminations |
20 |
| Type |
D-Type |
| Terminal Finish |
MATTE TIN |
| Technology |
CMOS |
| Voltage - Supply |
2V~6V |
| Terminal Position |
DUAL |
| Peak Reflow Temperature (Cel) |
NOT APPLICABLE |
| Supply Voltage |
3.3V |
| Terminal Pitch |
2.54mm |
| Reach Compliance Code |
unknown |
| Time@Peak Reflow Temperature-Max (s) |
NOT APPLICABLE |
| JESD-30 Code |
R-PDIP-T20 |
| Function |
Standard |
| Output Type |
Tri-State, Non-Inverted |
| Number of Elements |
1 |
| Supply Voltage-Max (Vsup) |
6V |
| Supply Voltage-Min (Vsup) |
2V |
| Number of Ports |
2 |
| Clock Frequency |
155MHz |
| Family |
AC |
| Current - Quiescent (Iq) |
40μA |
| Output Characteristics |
3-STATE |
| Current - Output High, Low |
24mA 24mA |
| Output Polarity |
TRUE |
| Number of Bits per Element |
8 |
| Max Propagation Delay @ V, Max CL |
9.5ns @ 5V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
4.5pF |
| Height Seated (Max) |
5.33mm |
| Length |
25.905mm |
| Width |
7.62mm |
| RoHS Status |
ROHS3 Compliant |
74AC374PC Overview
The flip flop is packaged in a case of 20-DIP (0.300, 7.62mm). The package Tubecontains it. It is configured with Tri-State, Non-Invertedas an output. The trigger it is configured with uses Positive Edge. Through Holeis positioned in the way of this electronic part. A voltage of 2V~6Vis required for its operation. A temperature of -40°C~85°C TAis used in the operation. D-Typedescribes this flip flop. It belongs to the 74ACseries of FPGAs. You should not exceed 155MHzin the output frequency of the device. In total, it contains 1 elements. As a result, it consumes 40μA of quiescent current without being affected by external factors. A total of 20terminations have been recorded. A voltage of 3.3V is used as the power supply for this D latch. Input capacitance of this device is 4.5pF farads. In this case, the D flip flop belongs to the ACfamily. Vsup reaches its maximum value at 6V. Normal operation requires a supply voltage (Vsup) above 2V. A total of 2ports are embedded in the D flip flop.
74AC374PC Features
Tube package
74AC series
74AC374PC Applications
There are a lot of Rochester Electronics, LLC 74AC374PC Flip Flops applications.
- Data storage
- Registers
- Counters
- Circuit Design
- Differential Individual
- ATE
- Buffered Clock
- Shift registers
- Balanced Propagation Delays
- Synchronous counter