SN74AUC2G80YEPR
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-XFBGA, DSBGA |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUC |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 0.8V~2.7V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.5mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AUC2G80 |
| JESD-30 Code | R-XBGA-B8 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Inverted |
| Number of Elements | 2 |
| Polarity | Inverting |
| Supply Voltage-Min (Vsup) | 0.8V |
| Clock Frequency | 275MHz |
| Turn On Delay Time | 5 ns |
| Family | AUC |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 9mA 9mA |
| Max I(ol) | 0.005 A |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 1.8ns @ 2.5V, 30pF |
| Prop. Delay@Nom-Sup | 3.9 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 2.5pF |
| Propagation Delay (tpd) | 3.9 ns |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 0.5mm |
| Width | 0.9mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Contains Lead |
SN74AUC2G80YEPR Overview
8-XFBGA, DSBGAis the way it is packaged. Package Tape & Reel (TR)embeds it. T flip flop uses Invertedas the output. JK flip flop uses Positive Edgeas the trigger. Surface Mountis in the way of this electric part. Powered by a 0.8V~2.7Vvolt supply, it operates as follows. It is operating at a temperature of -40°C~85°C TA. This D latch has the type D-Type. In this case, it is a type of FPGA belonging to the 74AUC series. There should be no greater frequency than 275MHzon its output. The element count is 2 . As a result, it consumes 10μA quiescent current. Terminations are 8. The object belongs to the 74AUC2G80 family. A voltage of 1.2V provides power to the D latch. Input capacitance of this device is 2.5pF farads. Electronic devices of this type belong to the AUCfamily. This electronic part is mounted in the way of Surface Mount. A Positive Edgeclock edge trigger is used in this device. The part is included in FF/Latches. Keeping the supply voltage (Vsup) above 0.8V is necessary for normal operation. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TAPE AND REEL.
SN74AUC2G80YEPR Features
Tape & Reel (TR) package
74AUC series
SN74AUC2G80YEPR Applications
There are a lot of Texas Instruments SN74AUC2G80YEPR Flip Flops applications.
- CMOS Process
- Single Down Count-Control Line
- Single Up Count-Control Line
- Registers
- Functionally equivalent to the MC10/100EL29
- Computers
- Memory
- Clock pulse
- ESD performance
- Common Clocks