SN74AS109ANSR
| Parameters | |
|---|---|
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | JK Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | TTL |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AS109 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Polarity | Non-Inverting |
| Number of Circuits | 2 |
| Output Current | 20mA |
| Clock Frequency | 105MHz |
| Propagation Delay | 9 ns |
| Turn On Delay Time | 2.5 ns |
| Family | AS |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Quiescent (Iq) | 17mA |
| Current - Output High, Low | 2mA 20mA |
| Max I(ol) | 0.008 A |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 9ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Schmitt Trigger | No |
| Number of Input Lines | 5 |
| Clock Edge Trigger Type | Positive Edge |
| Height | 2mm |
| Length | 10.3mm |
| Width | 5.3mm |
| Thickness | 1.95mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 6 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 1 week ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.209, 5.30mm Width) |
| Number of Pins | 16 |
| Weight | 200.686274mg |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AS |
SN74AS109ANSR Overview
As a result, it is packaged as 16-SOIC (0.209, 5.30mm Width). There is an embedded version in the package Tape & Reel (TR). This output is configured with Differential. In the configuration of the trigger, Positive Edgeis used. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 4.5V~5.5V. It is operating at 0°C~70°C TA. The type of this D latch is JK Type. It is a type of FPGA belonging to the 74AS series. You should not exceed 105MHzin its output frequency. T flip flop consumes 17mA quiescent energy. In 16terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. It is a member of the 74AS109 family. A voltage of 5V provides power to the D latch. It is a member of the ASfamily of D flip flop. Surface Mount mounts this electronic component. This board has 16 pins. This device's clock edge trigger type is Positive Edge. It is included in FF/Latches. Using 2 circuits, it is highly flexible. In light of its reliable performance, this T flip flop is well suited for TR. For high efficiency, the supply voltage should be kept at 5V. The output current of 20mA makes it feature maximum design flexibility. There are 5 input Lines, which consist of an electronic circuit connected between the ac mains and the rectifier input stage of the switching power supply.
SN74AS109ANSR Features
Tape & Reel (TR) package
74AS series
16 pins
SN74AS109ANSR Applications
There are a lot of Texas Instruments SN74AS109ANSR Flip Flops applications.
- Asynchronous counter
- Supports Live Insertion
- CMOS Process
- Data Synchronizers
- Control circuits
- Frequency division
- Shift registers
- Frequency Divider circuits
- Event Detectors
- Buffer registers