SI7252DP-T1-GE3
| Parameters | |
|---|---|
| Factory Lead Time | 14 Weeks |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | PowerPAK® SO-8 Dual |
| Number of Pins | 8 |
| Weight | 506.605978mg |
| Transistor Element Material | SILICON |
| Operating Temperature | -55°C~150°C TJ |
| Packaging | Digi-Reel® |
| Published | 2006 |
| Series | TrenchFET® |
| JESD-609 Code | e3 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin (Sn) |
| Max Power Dissipation | 46W |
| Terminal Form | C BEND |
| Base Part Number | SI7252 |
| JESD-30 Code | R-PDSO-C6 |
| Number of Elements | 2 |
| Element Configuration | Dual |
| Operating Mode | ENHANCEMENT MODE |
| Power Dissipation | 3.5W |
| Case Connection | DRAIN |
| Turn On Delay Time | 12 ns |
| FET Type | 2 N-Channel (Dual) |
| Transistor Application | SWITCHING |
| Rds On (Max) @ Id, Vgs | 18m Ω @ 15A, 10V |
| Vgs(th) (Max) @ Id | 3.5V @ 250μA |
| Input Capacitance (Ciss) (Max) @ Vds | 1170pF @ 50V |
| Gate Charge (Qg) (Max) @ Vgs | 27nC @ 10V |
| Rise Time | 12ns |
| Drain to Source Voltage (Vdss) | 100V |
| Fall Time (Typ) | 7 ns |
| Turn-Off Delay Time | 18 ns |
| Continuous Drain Current (ID) | 36.7A |
| Threshold Voltage | 1.5V |
| Gate to Source Voltage (Vgs) | 20V |
| Drain-source On Resistance-Max | 0.017Ohm |
| Drain to Source Breakdown Voltage | 100V |
| FET Technology | METAL-OXIDE SEMICONDUCTOR |
| Max Junction Temperature (Tj) | 150°C |
| FET Feature | Logic Level Gate |
| Height | 1.12mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
See Relate Datesheet