| Parameters |
| Mounting Type |
Through Hole |
| Package / Case |
20-DIP (0.300, 7.62mm) |
| Surface Mount |
NO |
| Operating Temperature |
0°C~70°C TA |
| Packaging |
Tube |
| Published |
1999 |
| Series |
74F |
| JESD-609 Code |
e4 |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| Type |
D-Type |
| Terminal Finish |
NICKEL PALLADIUM GOLD |
| Subcategory |
FF/Latches |
| Technology |
TTL |
| Voltage - Supply |
4.5V~5.5V |
| Terminal Position |
DUAL |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
5V |
| Terminal Pitch |
2.54mm |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Base Part Number |
74F273 |
| JESD-30 Code |
R-PDIP-T20 |
| Function |
Master Reset |
| Qualification Status |
Not Qualified |
| Output Type |
Non-Inverted |
| Number of Elements |
1 |
| Supply Voltage-Max (Vsup) |
5.5V |
| Power Supplies |
5V |
| Supply Voltage-Min (Vsup) |
4.5V |
| Load Capacitance |
50pF |
| Clock Frequency |
170MHz |
| Family |
F/FAST |
| Current - Quiescent (Iq) |
38mA |
| Current - Output High, Low |
1mA 20mA |
| Output Polarity |
TRUE |
| Max I(ol) |
0.02 A |
| Number of Bits per Element |
8 |
| Max Propagation Delay @ V, Max CL |
9.5ns @ 5V, 50pF |
| Trigger Type |
Positive Edge |
| Power Supply Current-Max (ICC) |
43mA |
| Height Seated (Max) |
4.2mm |
| Length |
26.73mm |
| Width |
7.62mm |
| RoHS Status |
ROHS3 Compliant |
N74F273AN,602 Overview
20-DIP (0.300, 7.62mm)is the way it is packaged. As part of the package Tube, it is embedded. The output it is configured with uses Non-Inverted. JK flip flop uses Positive Edgeas the trigger. Through Holeis occupied by this electronic component. Powered by a 4.5V~5.5Vvolt supply, it operates as follows. It is operating at a temperature of 0°C~70°C TA. The type of this D latch is D-Type. In FPGA terms, D flip flop is a type of 74Fseries FPGA. You should not exceed 170MHzin the output frequency of the device. A total of 1elements are present in it. This process consumes 38mA quiescents. The number of terminations is 20. The 74F273family includes it. Power is supplied from a voltage of 5V volts. A device of this type belongs to the family of F/FAST. This part is included in FF/Latches. There is a 5.5Vmaximum supply voltage (Vsup). Normal operation requires a supply voltage (Vsup) above 4.5V. The power supply is 5V.
N74F273AN,602 Features
Tube package
74F series
5V power supplies
N74F273AN,602 Applications
There are a lot of NXP USA Inc. N74F273AN,602 Flip Flops applications.
- Asynchronous counter
- Counters
- Data storage
- Set-reset capability
- Supports Live Insertion
- Buffer registers
- Consumer
- Bus hold
- Single Up Count-Control Line
- Individual Asynchronous Resets