| Parameters |
| RoHS Status |
Non-RoHS Compliant |
| Mounting Type |
Surface Mount |
| Package / Case |
20-SOIC (0.295, 7.50mm Width) |
| Surface Mount |
YES |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tape & Reel (TR) |
| Series |
74LVX |
| JESD-609 Code |
e0 |
| Pbfree Code |
no |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| Type |
D-Type |
| Terminal Finish |
TIN LEAD |
| Technology |
CMOS |
| Voltage - Supply |
2V~3.6V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
235 |
| Supply Voltage |
2.7V |
| Reach Compliance Code |
unknown |
| Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
| JESD-30 Code |
R-PDSO-G20 |
| Function |
Standard |
| Qualification Status |
COMMERCIAL |
| Output Type |
Tri-State, Non-Inverted |
| Number of Elements |
1 |
| Supply Voltage-Max (Vsup) |
3.6V |
| Supply Voltage-Min (Vsup) |
2V |
| Number of Ports |
2 |
| Clock Frequency |
75MHz |
| Family |
LV/LV-A/LVX/H |
| Current - Quiescent (Iq) |
4μA |
| Output Characteristics |
3-STATE |
| Current - Output High, Low |
4mA 4mA |
| Output Polarity |
TRUE |
| Number of Bits per Element |
8 |
| Max Propagation Delay @ V, Max CL |
16.7ns @ 3.3V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
4pF |
| Height Seated (Max) |
2.65mm |
| Width |
7.5mm |
MC74LVX574DWR2 Overview
The item is packaged in 20-SOIC (0.295, 7.50mm Width)cases. A package named Tape & Reel (TR)includes it. There is a Tri-State, Non-Invertedoutput configured with it. It is configured with a trigger that uses a value of Positive Edge. There is an electric part mounted in the way of Surface Mount. Powered by a 2V~3.6Vvolt supply, it operates as follows. It is operating at -40°C~85°C TA. D-Typedescribes this flip flop. The FPGA belongs to the 74LVX series. You should not exceed 75MHzin its output frequency. D latch consists of 1 elements. Despite external influences, it consumes 4μAof quiescent current. The number of terminations is 20. The power source is powered by 2.7V. Its input capacitance is 4pFfarads. In this case, the D flip flop belongs to the LV/LV-A/LVX/Hfamily. It reaches 3.6Vwhen the maximum supply voltage (Vsup) is applied. Normal operation requires a supply voltage (Vsup) above 2V. A total of 2ports are embedded in the D flip flop.
MC74LVX574DWR2 Features
Tape & Reel (TR) package
74LVX series
MC74LVX574DWR2 Applications
There are a lot of Rochester Electronics, LLC MC74LVX574DWR2 Flip Flops applications.
- Memory
- Latch-up performance
- Divide a clock signal by 2 or 4
- Supports Live Insertion
- Data transfer
- Memory
- Power down protection
- Bus hold
- Automotive
- QML qualified product