| Parameters |
| Mounting Type |
Surface Mount |
| Package / Case |
20-TSSOP (0.173, 4.40mm Width) |
| Surface Mount |
YES |
| Operating Temperature |
-40°C~85°C TA |
| Packaging |
Tube |
| Series |
74LCX |
| JESD-609 Code |
e4 |
| Pbfree Code |
yes |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| Type |
D-Type |
| Terminal Finish |
NICKEL PALLADIUM GOLD |
| Technology |
CMOS |
| Voltage - Supply |
2V~3.6V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
3.3V |
| Terminal Pitch |
0.65mm |
| Time@Peak Reflow Temperature-Max (s) |
40 |
| JESD-30 Code |
R-PDSO-G20 |
| Function |
Standard |
| Qualification Status |
COMMERCIAL |
| Output Type |
Tri-State, Non-Inverted |
| Number of Elements |
1 |
| Supply Voltage-Max (Vsup) |
3.6V |
| Supply Voltage-Min (Vsup) |
2V |
| Number of Ports |
2 |
| Clock Frequency |
150MHz |
| Family |
LVC/LCX/Z |
| Current - Quiescent (Iq) |
10μA |
| Output Characteristics |
3-STATE |
| Current - Output High, Low |
24mA 24mA |
| Output Polarity |
TRUE |
| Number of Bits per Element |
8 |
| Max Propagation Delay @ V, Max CL |
8.5ns @ 3.3V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
7pF |
| Propagation Delay (tpd) |
9.5 ns |
| Length |
6.5mm |
| Width |
4.4mm |
| RoHS Status |
ROHS3 Compliant |
MC74LCX574DT Overview
The package is in the form of 20-TSSOP (0.173, 4.40mm Width). As part of the package Tube, it is embedded. Tri-State, Non-Invertedis the output configured for it. It is configured with the trigger Positive Edge. Surface Mountis occupied by this electronic component. A voltage of 2V~3.6Vis required for its operation. A temperature of -40°C~85°C TAis used in the operation. The type of this D latch is D-Type. This type of FPGA is a part of the 74LCX series. You should not exceed 150MHzin the output frequency of the device. The list contains 1 elements. There is a consumption of 10μAof quiescent energy. Terminations are 20. A voltage of 3.3V is used to power it. The input capacitance of this JK flip flopis 7pF farads. Electronic devices of this type belong to the LVC/LCX/Zfamily. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. A normal operating voltage (Vsup) should remain above 2V. There are 2 ports embedded in the flip flops.
MC74LCX574DT Features
Tube package
74LCX series
MC74LCX574DT Applications
There are a lot of Rochester Electronics, LLC MC74LCX574DT Flip Flops applications.
- High Performance Logic for test systems
- Shift Registers
- Asynchronous counter
- Bus hold
- ATE
- ESD performance
- Storage Registers
- Dynamic threshold performance
- Guaranteed simultaneous switching noise level
- Clock pulse