Parameters |
Lead Free |
Lead Free |
Mount |
Through Hole |
Mounting Type |
Through Hole |
Package / Case |
20-DIP (0.300, 7.62mm) |
Number of Pins |
20 |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Tube |
Published |
2005 |
Series |
74HCT |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Tin (Sn) |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Terminal Pitch |
2.54mm |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
74HCT374 |
Function |
Standard |
Output Type |
Tri-State, Non-Inverted |
Operating Supply Voltage |
5V |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Power Supplies |
5V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Number of Ports |
2 |
Power Dissipation |
40W |
Output Current |
6mA |
Number of Bits |
8 |
Clock Frequency |
30MHz |
Propagation Delay |
47 ns |
Turn On Delay Time |
31 ns |
Family |
HCT |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
4μA |
Current - Output High, Low |
6mA 6mA |
Collector Emitter Breakdown Voltage |
-80V |
Max I(ol) |
0.006 A |
Max Propagation Delay @ V, Max CL |
31ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
10pF |
Number of Output Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Height Seated (Max) |
4.57mm |
Width |
7.62mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
MC74HCT374ANG Overview
It is packaged in the way of 20-DIP (0.300, 7.62mm). A package named Tubeincludes it. The output it is configured with uses Tri-State, Non-Inverted. There is a trigger configured with Positive Edge. There is an electrical part that is mounted in the way of Through Hole. A supply voltage of 4.5V~5.5V is required for operation. -55°C~125°C TAis the operating temperature. D-Typeis the type of this D latch. JK flip flop belongs to the 74HCTseries of FPGAs. There should be no greater frequency than 30MHzon its output. D latch consists of 1 elements. During its operation, it consumes 4μA quiescent energy. Currently, there are 20 terminations. JK flip flop belongs to 74HCT374 family. The power source is powered by 5V. The input capacitance of this T flip flop is 10pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. Electronic devices of this type belong to the HCTfamily. It is mounted in the way of Through Hole. This board is designed with 20pins on it. It has a clock edge trigger type of Positive Edge. The RS flip flops belongs to FF/Latches base part number. An electronic part with 8bits has been designed. To achieve this superior flexibility, 8 circuits are used. The system runs on a power supply of 5V watts. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. For high efficiency, the supply voltage should be set to 5V. This T flip flop features a maximum design flexibility due to its output current of 6mA. It operates with 3 output lines.
MC74HCT374ANG Features
Tube package
74HCT series
20 pins
8 Bits
5V power supplies
MC74HCT374ANG Applications
There are a lot of ON Semiconductor MC74HCT374ANG Flip Flops applications.
- Balanced 24 mA output drivers
- Test & Measurement
- Guaranteed simultaneous switching noise level
- Pattern generators
- Convert a momentary switch to a toggle switch
- Communications
- Shift Registers
- Instrumentation
- Buffer registers
- Registers