| Parameters |
| Mount |
Through Hole |
| Mounting Type |
Through Hole |
| Package / Case |
20-DIP (0.300, 7.62mm) |
| Number of Pins |
20 |
| Operating Temperature |
-55°C~125°C TA |
| Packaging |
Tube |
| Series |
74HC |
| JESD-609 Code |
e3 |
| Part Status |
Obsolete |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
20 |
| Termination |
Through Hole |
| Type |
D-Type |
| Terminal Finish |
Matte Tin (Sn) |
| Subcategory |
FF/Latches |
| Technology |
CMOS |
| Voltage - Supply |
2V~6V |
| Terminal Position |
DUAL |
| Supply Voltage |
4.5V |
| Terminal Pitch |
2.54mm |
| Base Part Number |
M74HC273 |
| Function |
Master Reset |
| Output Type |
Non-Inverted |
| Number of Elements |
1 |
| Polarity |
Non-Inverting |
| Supply Voltage-Max (Vsup) |
6V |
| Power Supplies |
2/6V |
| Supply Voltage-Min (Vsup) |
2V |
| Number of Circuits |
8 |
| Load Capacitance |
50pF |
| Power Dissipation |
500mW |
| Output Current |
5.2mA |
| Number of Bits |
8 |
| Clock Frequency |
66MHz |
| Propagation Delay |
240 ns |
| Turn On Delay Time |
15 ns |
| Family |
HC/UH |
| Logic Function |
D-Type, Flip-Flop |
| Current - Quiescent (Iq) |
4μA |
| Current - Output High, Low |
5.2mA 5.2mA |
| Max I(ol) |
0.004 A |
| Max Propagation Delay @ V, Max CL |
25ns @ 6V, 50pF |
| Trigger Type |
Positive Edge |
| Input Capacitance |
5pF |
| fmax-Min |
24 MHz |
| Clock Edge Trigger Type |
Positive Edge |
| Height |
3.93mm |
| Length |
25.4mm |
| Width |
7.1mm |
| Radiation Hardening |
No |
| REACH SVHC |
No SVHC |
| RoHS Status |
ROHS3 Compliant |
| Lead Free |
Lead Free |
M74HC273B1R Overview
The package is in the form of 20-DIP (0.300, 7.62mm). It is contained within the Tubepackage. As configured, the output uses Non-Inverted. This trigger uses the value Positive Edge. Through Holeis occupied by this electronic component. A voltage of 2V~6Vis used as the supply voltage. -55°C~125°C TAis the operating temperature. D-Typeis the type of this D latch. It is a type of FPGA belonging to the 74HC series. In order for it to function properly, its output frequency should not exceed 66MHz. D latch consists of 1 elements. As a result, it consumes 4μA quiescent current and is not affected by external forces. A total of 20 terminations have been made. JK flip flop belongs to M74HC273 family. A voltage of 4.5V is used to power it. JK flip flop input capacitance is 5pF farads. In terms of electronic devices, this device belongs to the HC/UHfamily of devices. It is mounted by the way of Through Hole. The 20pins are designed into the board. This device exhibits a clock edge trigger type of Positive Edge. This part is included in FF/Latches. This flip flop is designed with 8 Bits. It reaches the maximum supply voltage (Vsup) at 6V. Keeping the supply voltage (Vsup) above 2V is necessary for normal operation. To achieve this superior flexibility, 8 circuits are used. An electrical current of 2/6V volts is applied to it. This T flip flop features a maximum design flexibility due to its output current of 5.2mA.
M74HC273B1R Features
Tube package
74HC series
20 pins
8 Bits
2/6V power supplies
M74HC273B1R Applications
There are a lot of STMicroelectronics M74HC273B1R Flip Flops applications.
- QML qualified product
- Set-reset capability
- EMI reduction circuitry
- Asynchronous counter
- Registers
- Test & Measurement
- Guaranteed simultaneous switching noise level
- Counters
- Single Down Count-Control Line
- Individual Asynchronous Resets