| Parameters |
| Factory Lead Time |
12 Weeks |
| Mount |
Surface Mount |
| Package / Case |
PLCC |
| Number of Pins |
44 |
| Published |
1998 |
| JESD-609 Code |
e0 |
| Pbfree Code |
no |
| Part Status |
Discontinued |
| Moisture Sensitivity Level (MSL) |
1 |
| Number of Terminations |
44 |
| ECCN Code |
EAR99 |
| Terminal Finish |
Tin/Lead (Sn/Pb) |
| Max Operating Temperature |
70°C |
| Min Operating Temperature |
0°C |
| Subcategory |
Programmable Logic Devices |
| Technology |
CMOS |
| Terminal Position |
QUAD |
| Terminal Form |
J BEND |
| Peak Reflow Temperature (Cel) |
220 |
| Supply Voltage |
5V |
| Terminal Pitch |
1.27mm |
| Frequency |
151.5MHz |
| Time@Peak Reflow Temperature-Max (s) |
30 |
| Pin Count |
44 |
| Operating Supply Voltage |
5V |
| Power Supplies |
5V |
| Temperature Grade |
COMMERCIAL |
| Max Supply Voltage |
5.25V |
| Min Supply Voltage |
4.75V |
| Number of I/O |
36 |
| Memory Type |
EEPROM |
| Propagation Delay |
15 ns |
| Turn On Delay Time |
15 ns |
| Frequency (Max) |
151.5MHz |
| Programmable Logic Type |
EE PLD |
| Number of Gates |
1250 |
| Number of Programmable I/O |
36 |
| Number of Logic Blocks (LABs) |
4 |
| Speed Grade |
15 |
| Output Function |
MACROCELL |
| Number of Macro Cells |
64 |
| JTAG BST |
NO |
| In-System Programmable |
NO |
| Height |
3.81mm |
| Length |
16.59mm |
| Width |
16.59mm |
| Radiation Hardening |
No |
| REACH SVHC |
No SVHC |
| RoHS Status |
RoHS Compliant |
| Lead Free |
Contains Lead |
EPM7064LC44-15 Overview
There are 64 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).You can find it in package [0].There are 36 I/Os on the board.It is programmed to terminate devices at [0].This electrical part is wired with a terminal position of QUAD.A voltage of 5V is used as the power supply for this device.It is a part of family [0].There are 44pins on the chip.A digital circuit can be constructed using 1250gates.If high efficiency is desired, the supply voltage should be kept at [0].EEPROM is adopted for storing data.The electronic part is mounted by Surface Mount.The device is designed with pins [0].There is a maximum supply voltage of 5.25Vwhen the device is operating.A minimum supply voltage of 4.75V is required for it to operate.There is 5V power supply available for it.A total of 36Programmable I/Os are present.It is possible to achieve a frequency of 151.5MHz.It is recommended that the operating temperature be higher than 0°C.Ideally, the operating temperature should be below 70°C.There are 4 logic blocks (LABs) in its basic building block.The maximum frequency should not exceed 151.5MHz.There is a type of programmable logic called EE PLD.
EPM7064LC44-15 Features
PLCC package
36 I/Os
44 pin count
44 pins
5V power supplies
4 logic blocks (LABs)
EPM7064LC44-15 Applications
There are a lot of Altera EPM7064LC44-15 CPLDs applications.
- Portable digital devices
- STANDARD SERIAL INTERFACE UART
- Boolean function generators
- PULSE WIDTH MODULATION (PWM)
- Wide Vin Industrial low power SMPS
- D/T registers and latches
- Programmable power management
- Page register
- Digital systems
- Power automation