| Parameters |
| Factory Lead Time |
6 Weeks |
| Lifecycle Status |
ACTIVE (Last Updated: 5 days ago) |
| Contact Plating |
Gold |
| Mount |
Surface Mount |
| Mounting Type |
Surface Mount |
| Package / Case |
6-TSSOP, SC-88, SOT-363 |
| Number of Pins |
6 |
| Operating Temperature |
-40°C~125°C TA |
| Packaging |
Tape & Reel (TR) |
| Series |
Automotive, AEC-Q100, 74LVC |
| JESD-609 Code |
e4 |
| Pbfree Code |
yes |
| Part Status |
Active |
| Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
| Number of Terminations |
6 |
| ECCN Code |
EAR99 |
| Type |
D-Type |
| Subcategory |
FF/Latches |
| Packing Method |
TR |
| Technology |
CMOS |
| Voltage - Supply |
1.65V~5.5V |
| Terminal Position |
DUAL |
| Terminal Form |
GULL WING |
| Peak Reflow Temperature (Cel) |
260 |
| Supply Voltage |
1.8V |
| Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
| Base Part Number |
74LVC1G374 |
| Function |
Standard |
| Qualification Status |
Not Qualified |
| Output Type |
Tri-State, Non-Inverted |
| Polarity |
Non-Inverting |
| Supply Voltage-Max (Vsup) |
5.5V |
| Number of Circuits |
1 |
| Load Capacitance |
50pF |
| Number of Ports |
2 |
| Number of Bits |
1 |
| Clock Frequency |
175MHz |
| Propagation Delay |
5 ns |
| Quiescent Current |
10μA |
| Turn On Delay Time |
1 ns |
| Family |
LVC/LCX/Z |
| Logic Function |
D-Type, Flip-Flop |
| Current - Output High, Low |
40mA 40mA |
| Max Propagation Delay @ V, Max CL |
5ns @ 5V, 50pF |
| Prop. Delay@Nom-Sup |
7 ns |
| Trigger Type |
Positive Edge |
| Input Capacitance |
3pF |
| Number of Output Lines |
3 |
| Count Direction |
UNIDIRECTIONAL |
| Clock Edge Trigger Type |
Positive Edge |
| Translation |
N/A |
| Height |
1.1mm |
| Length |
2mm |
| Width |
1.25mm |
| Thickness |
900μm |
| RoHS Status |
ROHS3 Compliant |
| Lead Free |
Lead Free |
CLVC1G374QDCKRQ1 Overview
As a result, it is packaged as 6-TSSOP, SC-88, SOT-363. D flip flop is included in the Tape & Reel (TR)package. There is a Tri-State, Non-Invertedoutput configured with it. There is a trigger configured with Positive Edge. Surface Mountis occupied by this electronic component. The JK flip flop operates at 1.65V~5.5Vvolts. In this case, the operating temperature is -40°C~125°C TA. This D latch has the type D-Type. The FPGA belongs to the Automotive, AEC-Q100, 74LVC series. A frequency of 175MHzshould not be exceeded by its output. A total of 6terminations have been recorded. The 74LVC1G374family includes it. The D flip flop is powered by a voltage of 1.8V . Input capacitance of this device is 3pF farads. A device of this type belongs to the family of LVC/LCX/Z. It is mounted in the way of Surface Mount. Basically, it is designed with a set of 6 pins. There is a clock edge trigger type of Positive Edgeon this device. The part you are looking for is included in FF/Latches. The design is based on 1bits. 5.5Vis the maximum supply voltage (Vsup). The superior flexibility of this product is achieved by using 1 circuits. As a result of its reliability, this D flip flop is ideally suited for TR. The flip flop has 2embedded ports. In order for the chip to function, it has 3output lines. This D latch consumes 10μA quiescent current at all.
CLVC1G374QDCKRQ1 Features
Tape & Reel (TR) package
Automotive, AEC-Q100, 74LVC series
6 pins
1 Bits
CLVC1G374QDCKRQ1 Applications
There are a lot of Texas Instruments CLVC1G374QDCKRQ1 Flip Flops applications.
- Patented noise
- Single Down Count-Control Line
- Guaranteed simultaneous switching noise level
- Supports Live Insertion
- Dynamic threshold performance
- Data transfer
- Buffer registers
- Storage registers
- 2 – Bit synchronous counter
- Frequency Divider circuits