74LVTH374WM
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 20 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LVTH |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 2.7V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 3.3V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVTH374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Operating Supply Voltage | 3.3V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 2.7V |
| Number of Circuits | 8 |
| Number of Ports | 2 |
| Number of Bits | 8 |
| Clock Frequency | 160MHz |
| Propagation Delay | 5.2 ns |
| Turn On Delay Time | 4.8 ns |
| Family | LVT |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 190μA |
| Current - Output High, Low | 32mA 64mA |
| Max Propagation Delay @ V, Max CL | 4.9ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Number of Output Lines | 3 |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
74LVTH374WM Overview
It is embeded in 20-SOIC (0.295, 7.50mm Width) case. It is included in the package Tube. This output is configured with Tri-State, Non-Inverted. JK flip flop uses Positive Edgeas the trigger. In this case, the electronic component is mounted in the way of Surface Mount. Powered by a 2.7V~3.6Vvolt supply, it operates as follows. A temperature of -40°C~85°C TAis used in the operation. It belongs to the type D-Typeof flip flops. In this case, it is a type of FPGA belonging to the 74LVTH series. In order for it to function properly, its output frequency should not exceed 160MHz. A total of 1elements are present in it. Despite external influences, it consumes 190μAof quiescent current. There are 20 terminations,The 74LVTH374 family contains this object. The D flip flop is powered by a voltage of 3.3V . A 3pFfarad input capacitance is provided by this T flip flop. It belongs to the family of electronic devices known as LVT. Electronic part Surface Mountis mounted in the way. It is designed with 20 pins. There is a clock edge trigger type of Positive Edgeon this device. This flip flop is designed with 8 Bits. Keeping the supply voltage (Vsup) above 2.7V is necessary for normal operation. The superior flexibility of this product is achieved by using 8 circuits. This D flip flop is equipped with 0 ports. High efficiency requires the supply voltage to be maintained at 3.3V. There are 3 output lines on it.
74LVTH374WM Features
Tube package
74LVTH series
20 pins
8 Bits
74LVTH374WM Applications
There are a lot of ON Semiconductor 74LVTH374WM Flip Flops applications.
- Parallel data storage
- Memory
- QML qualified product
- Pattern generators
- Load Control
- Balanced 24 mA output drivers
- Power down protection
- Patented noise
- Frequency Divider circuits
- Data storage