74LVT16374ADL,118
| Parameters | |
|---|---|
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 48-BSSOP (0.295, 7.50mm Width) |
| Number of Pins | 48 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVT |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 48 |
| Type | D-Type |
| Technology | BICMOS |
| Voltage - Supply | 2.7V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.635mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVT16374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Operating Supply Voltage | 3.3V |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Number of Bits | 16 |
| Clock Frequency | 150MHz |
| Propagation Delay | 3 ns |
| Quiescent Current | 4mA |
| Turn On Delay Time | 3 ns |
| Family | LVT |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 120μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 64mA |
| Max Propagation Delay @ V, Max CL | 5ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Power Supply Current-Max (ICC) | 6mA |
| Number of Output Lines | 8 |
| Clock Edge Trigger Type | Positive Edge |
| Width | 7.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 13 Weeks |
74LVT16374ADL,118 Overview
It is embeded in 48-BSSOP (0.295, 7.50mm Width) case. A package named Tape & Reel (TR)includes it. T flip flop is configured with an output of Tri-State, Non-Inverted. This trigger is configured to use Positive Edge. There is an electric part mounted in the way of Surface Mount. It operates with a supply voltage of 2.7V~3.6V. A temperature of -40°C~85°C TAis used in the operation. D-Typeis the type of this D latch. JK flip flop belongs to the 74LVTseries of FPGAs. A frequency of 150MHzshould be the maximum output frequency. D latch consists of 2 elements. As a result, it consumes 120μA of quiescent current without being affected by external factors. The number of terminations is 48. The 74LVT16374 family contains it. A voltage of 3.3V is used to power it. Its input capacitance is 3pF farads. In this case, the D flip flop belongs to the LVTfamily. A part of the electronic system is mounted in the way of Surface Mount. The 48pins are designed into the board. This device exhibits a clock edge trigger type of Positive Edge. This flip flop is designed with 16 Bits. The maximal supply voltage (Vsup) reaches 3.6V. This D flip flop is equipped with 0 ports. In order to achieve high efficiency, the supply voltage should be maintained at 3.3V. There are 8 output lines on it. As a result, it consumes 4mA of quiescent current without being affected by external factors.
74LVT16374ADL,118 Features
Tape & Reel (TR) package
74LVT series
48 pins
16 Bits
74LVT16374ADL,118 Applications
There are a lot of Nexperia USA Inc. 74LVT16374ADL,118 Flip Flops applications.
- Clock pulse
- Computers
- Bus hold
- Dynamic threshold performance
- Computing
- Digital electronics systems
- Memory
- Frequency Divider circuits
- Automotive
- Frequency division